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[89.77.68.124]) by smtp.gmail.com with ESMTPSA id r10sm539546ljp.56.2021.10.21.06.09.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 21 Oct 2021 06:09:51 -0700 (PDT) Subject: Re: [GIT PULL] riscv: dts: few cleanups for v5.16 To: Conor.Dooley@microchip.com, arnd@arndb.de List-Id: Cc: olof@lixom.net, arm@kernel.org, soc@kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, krzk@kernel.org, palmerdabbelt@google.com, paul.walmsley@sifive.com, aou@eecs.berkeley.edu, linux-riscv@lists.infradead.org References: <20211021090955.115005-1-krzysztof.kozlowski@canonical.com> <10f5244d-ba2a-33eb-72dc-77b2a7a0d101@microchip.com> From: Krzysztof Kozlowski Message-ID: <4a27b400-4fb1-bb7a-335a-ae1d084cdf73@canonical.com> Date: Thu, 21 Oct 2021 15:09:50 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <10f5244d-ba2a-33eb-72dc-77b2a7a0d101@microchip.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 21/10/2021 15:06, Conor.Dooley@microchip.com wrote: > On 21/10/2021 13:23, Arnd Bergmann wrote: >> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe >> >> On Thu, Oct 21, 2021 at 11:09 AM Krzysztof Kozlowski >> wrote: >>> Hi Arnd and Olof, >>> >>> I have an old patchset for RISC-V dts cleanups which I sent to mailing lists in >>> August 2021 (v1, v2), resent in September and pinged two times. They got some >>> review (from Alexandre Ghiti for SiFive, from Conor Dooley for Microchip) but >>> unfortunately Palmer (RISC-V maintainer) did not respond here. > > Out of curiosity which series is this one? Is it the one with the > plic/clint changes? > Pretty sure that I have taken them in internally, but I am going to > submit a bunch > of changes to our device tree soon (tm) and want to make sure I have the > right > dependent series listed. > There is only one Microchip patch here (plic/clint). Others are for SiFive. All the patches are described in the pull reqeust: https://lore.kernel.org/lkml/20211021090955.115005-1-krzysztof.kozlowski@canonical.com/ I had also second set of RISC-V patches for Microchip. These were picked up by Palmer: https://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git/log/?h=for-next Best regards, Krzysztof