From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965425AbeAMBL3 (ORCPT + 1 other); Fri, 12 Jan 2018 20:11:29 -0500 Received: from vern.gendns.com ([206.190.152.46]:32842 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965201AbeAMBL1 (ORCPT ); Fri, 12 Jan 2018 20:11:27 -0500 Subject: Re: [PATCH v5 02/44] clk: davinci: New driver for davinci PLL clocks To: Sekhar Nori , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Kevin Hilman , Adam Ford , linux-kernel@vger.kernel.org References: <1515377863-20358-1-git-send-email-david@lechnology.com> <1515377863-20358-3-git-send-email-david@lechnology.com> <7fc8bd35-0416-216d-8e1e-53a0ec6e8790@ti.com> <01fbde0e-36a0-2b19-e385-e63bc4a3ae4a@lechnology.com> From: David Lechner Message-ID: <4a32c52f-4335-52c0-fa63-625a449b00b5@lechnology.com> Date: Fri, 12 Jan 2018 19:11:26 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On 01/12/2018 10:18 AM, Sekhar Nori wrote: > On Friday 12 January 2018 08:55 PM, David Lechner wrote: >>> >>> PLL output on DA850 must never be below 300MHz or above 600MHz (see >>> datasheet table "Allowed PLL Operating Conditions"). Does this take care >>> of that? Thats one of the main reasons I recall I went with some >>> specific values of prediv, pllm and post div in >>> arch/arm/mach-davinci/da850.c >> >> Apparently, I missed this requirement. It looks like I am going to have to >> rework things so that there is some coordination between the PLL and the >> PLLDIV clocks in order to get the < 300MHz operating points. > > Just to make sure we are on the same page. The datasheet > constraint is 600 >= PLLOUT >= 300. PLLOUT is output of POSTDIV. Hmm... I am on a different page. It looks to me like PLLOUT is the output of PLLM, not POSTDIV. The datasheet says nothing at all and the TRM does not say it explicitly, but footnote 2 on the table "System PLLC Output Clocks", for example, makes it pretty clear. > > The operating points are defined in terms of ARM frequency (and > voltage). The OPPs defined in kernel today are here: > https://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci.git/tree/arch/arm/mach-davinci/da850.c#n1092 > > Thanks, > Sekhar >