From: Tim Chen <tim.c.chen@linux.intel.com>
To: Shrikanth Hegde <sshegde@linux.ibm.com>,
maddy@linux.ibm.com, linuxppc-dev@lists.ozlabs.org,
peterz@infradead.org
Cc: christophe.leroy@csgroup.eu, linux-kernel@vger.kernel.org,
ritesh.list@gmail.com, kprateek.nayak@amd.com,
yu.c.chen@intel.com, vineethr@linux.ibm.com,
vincent.guittot@linaro.org, srikar@linux.ibm.com,
npiggin@gmail.com, mpe@ellerman.id.au
Subject: Re: [PATCH v2 0/4] powerpc/topology: Introduce llc_override kernel parameter
Date: Fri, 23 Oct 2026 10:58:16 -0700 [thread overview]
Message-ID: <4a71f654cdc03973f309754a2f61810b4547a471.camel@linux.intel.com> (raw)
In-Reply-To: <20261023131646.2907938-1-sshegde@linux.ibm.com>
On Fri, 2026-10-23 at 18:46 +0530, Shrikanth Hegde wrote:
> Provide an option for users to enable cache aware scheduling on powerpc
> via a command line parameter.
>
> More details of the problem and context is in cover-letter of v1.
> v1: https://lore.kernel.org/all/20261012102037.2477378-1-sshegde@linux.ibm.com/
>
> v1->v2:
> - Move to kernel parameters from debugfs. This helps to keep
> llc_id consistent which doesn't change across sched domain
> rebuilds. (Tim Chen)
> - Update arch_llc_mask to reflect the override (Tim Chen)
> - Limit only to mc, pkg (Srikar Dronamraju)
>
> Notes:
>
> - A selftest for the functional validation of cache aware scheduling
> is a good idea as we discussed in v1. It is a significant change on
> its own and likely takes time. I am thinking it might be good idea to
> revisit selftests for scheduler in general. (We have very few).
> Maybe worth a discussion in coming OSPM.
>
> - I am on parental leave. This version is pretty much what I had last week
> and I haven't gotten any chance to update since. just sending it out.
> Sorry if I have missed to address any comments.
> Please expect delays in my response.
Thanks for sending this while on leave, and congratulations!
The updated approach with boot parameters looks good to me.
Some minor points:
1. llc_bytes. As Chen Yu noted, get_effective_llc_bytes() returns 0
on powerpc because the generic cacheinfo is not populated. With
NUMA balancing on and the default llc_aggr_tolerance, any process
with a footprint then fails exceed_llc_capacity(), so cache aware
scheduling still does not engage.
2. Bisection. Patch 2 moves SD_SHARE_LLC to MC/PKG, but
arch_llc_mask() only follows in patch 3, so a kernel at patch 2
booted with llc_override=mc has sd_llc at MC with per-L2 llc ids,
causing mismatch. It may be better to squash 2 and 3.
3. llc_override is only written at boot. Making it
static int llc_override __ro_after_init;
and then you don't have to worry about READ_ONCE and WRITE_ONCE
to it as Chen Yu pointed out.
Tim
>
> Shrikanth Hegde (4):
> powerpc/topology: Introduce llc_override kernel parameter
> powerpc/topology: Update mc/pkg flags based on llc_override
> powerpc/topology: update arch_llc_mask based llc_override
> Documentation/powerpc: Add details about llc_override
>
> .../admin-guide/kernel-parameters.txt | 15 ++++
> arch/powerpc/include/asm/topology.h | 8 +--
> arch/powerpc/kernel/smp.c | 69 +++++++++++++++++--
> 3 files changed, 81 insertions(+), 11 deletions(-)
prev parent reply other threads:[~2026-10-23 17:58 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-23 13:16 Shrikanth Hegde
2026-10-23 13:16 ` [PATCH v2 1/4] " Shrikanth Hegde
2026-10-23 15:42 ` Chen Yu
2026-10-23 13:16 ` [PATCH v2 2/4] powerpc/topology: Update mc/pkg flags based on llc_override Shrikanth Hegde
2026-10-23 13:16 ` [PATCH v2 3/4] powerpc/topology: Update arch_llc_mask based llc_override Shrikanth Hegde
2026-10-23 13:16 ` [PATCH v2 4/4] Documentation/powerpc: Add details about llc_override Shrikanth Hegde
2026-10-23 17:58 ` Tim Chen [this message]
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