From: "Andy Yan" <andyshrk@163.com>
To: "Sebastian Reichel" <sebastian.reichel@collabora.com>
Cc: "Vinod Koul" <vkoul@kernel.org>,
"Neil Armstrong" <neil.armstrong@linaro.org>,
"Heiko Stuebner" <heiko@sntech.de>,
"Andy Yan" <andy.yan@rock-chips.com>,
"Yubing Zhang" <yubing.zhang@rock-chips.com>,
linux-phy@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
kernel@collabora.com, "Frank Wang" <frank.wang@rock-chips.com>,
"William Wu" <william.wu@rock-chips.com>
Subject: Re:[PATCH 0/7] phy: rockchip: usbdp: Fixes, DP 1-lane support and cleanups
Date: Wed, 4 Feb 2026 20:09:22 +0800 (CST) [thread overview]
Message-ID: <4a7a30c4.8848.19c288ea1f3.Coremail.andyshrk@163.com> (raw)
In-Reply-To: <20260203-rockchip-usbdp-cleanup-v1-0-16a6f92ed176@collabora.com>
Hello Sebastian,
At 2026-02-04 02:41:26, "Sebastian Reichel" <sebastian.reichel@collabora.com> wrote:
>As there are some issues with the DisplayPort support, I went
>though Rockchip's BSP kernel tree and looked for fixes. I found
>two small changes for the initial register setup, which do not
>help with the DP issue but seem sensible in general. Afterwards
>I added one more fix, which corrects an issue that effectively
>results in USB-C adapters with combined USB3+DP capabilities
>not being able to use the DP part.
>
>Afterwards I added one more patch adding single-lane DP support
>(found in Rockchip BSP kernel) and a couple of cleanups from my
>side. These are logically independent from the fixes, but I put
>all together in a single series because they need to be applied
>in the right order to avoid conflicts.
>
>Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
>---
>Frank Wang (1):
> phy: rockchip: usbdp: Amend SSC modulation deviation
>
>Sebastian Reichel (4):
> phy: rockchip: usbdp: Add missing mode_change update
> phy: rockchip: usbdp: Rename DP lane functions
> phy: rockchip: usbdp: Use FIELD_PREP_WM16_CONST
> phy: rockchip: usbdp: Cleanup DP lane selection function
>
>William Wu (1):
> phy: rockchip: usbdp: Fix LFPS detect threshold control
>
>Zhang Yubing (1):
> phy: rockchip: usbdp: Support single-lane DP
>
> drivers/phy/rockchip/phy-rockchip-usbdp.c | 114 +++++++++++++-----------------
> 1 file changed, 48 insertions(+), 66 deletions(-)
After applying this series of patches, the hub that previously couldn’t recognize Alt Mode can now detect it and work properly,
but it also triggers a USB-related SERR — did I miss something?
[ 2.639842][ T244] 8021q: adding VLAN 0 to HW filter on device eth1
[ 3.872936][ T23] usb 3-1: new high-speed USB device number 2 using xhci-hcd
[ 4.011232][ T23] usb 3-1: New USB device found, idVendor=2109, idProduct=2817, bcdDevice= 5.54
[ 4.012102][ T23] usb 3-1: New USB device strings: Mfr=1, Product=2, SerialNumber=3
[ 4.012908][ T23] usb 3-1: Product: USB2.0 Hub
[ 4.013469][ T23] usb 3-1: Manufacturer: VIA Labs, Inc.
[ 4.014064][ T23] usb 3-1: SerialNumber: 000000000
[ 4.071154][ T23] hub 3-1:1.0: USB hub found
[ 4.071876][ T23] hub 3-1:1.0: 5 ports detected
[ 4.385554][ C1] SError Interrupt on CPU1, code 0x00000000bf000002 -- SError
[ 4.385592][ C1] CPU: 1 UID: 0 PID: 96 Comm: kworker/1:1 Tainted: G M 6.19.0-rc4+ #223 PREEMPT
[ 4.385623][ C1] Tainted: [M]=MACHINE_CHECK
[ 4.385632][ C1] Hardware name: ArmSoM Sige5 (DT)
[ 4.385644][ C1] Workqueue: usb_hub_wq hub_event
[ 4.385680][ C1] pstate: 000000c5 (nzcv daIF -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[ 4.385701][ C1] pc : el1_abort+0x34/0x68
[ 4.385728][ C1] lr : el1_abort+0x24/0x68
[ 4.385749][ C1] sp : ffff8000833a36c0
[ 4.385758][ C1] x29: ffff8000833a36c0 x28: ffff0000c3568000 x27: ffff0000c3d70c48
[ 4.385792][ C1] x26: ffff0000c13c8d78 x25: 0000000000000004 x24: 0000000000000001
[ 4.385823][ C1] x23: 00000000600000c5 x22: ffff800084088430 x21: 0000000096000210
[ 4.385854][ C1] x20: 0000000000000000 x19: ffff8000833a3700 x18: 00000000ffffffff
[ 4.385885][ C1] x17: ffff800083179000 x16: ffffffffffffffff x15: ffff0000c11ba128
[ 4.385916][ C1] x14: 0000000000000376 x13: 0000000000000376 x12: 0000000000000000
[ 4.385946][ C1] x11: 00000000000000c0 x10: 0000000000000af0 x9 : 0000000000002303
[ 4.385976][ C1] x8 : ffff8000833a3740 x7 : ffff8000833a3830 x6 : ffff8000833a3800
[ 4.386006][ C1] x5 : ffff8000833a3780 x4 : ffff8000833a4000 x3 : ffff8000812c986c
[ 4.386037][ C1] x2 : ffff8000812c986c x1 : 00000000000000c0 x0 : 0000000000000000
[ 4.386071][ C1] Kernel panic - not syncing: Asynchronous SError Interrupt
[ 4.386085][ C1] CPU: 1 UID: 0 PID: 96 Comm: kworker/1:1 Tainted: G M 6.19.0-rc4+ #223 PREEMPT
[ 4.386113][ C1] Tainted: [M]=MACHINE_CHECK
[ 4.386121][ C1] Hardware name: ArmSoM Sige5 (DT)
[ 4.386131][ C1] Workqueue: usb_hub_wq hub_event
[ 4.386156][ C1] Call trace:
[ 4.386164][ C1] show_stack+0x18/0x24 (C)
[ 4.386202][ C1] dump_stack_lvl+0x60/0x80
[ 4.386236][ C1] dump_stack+0x18/0x24
[ 4.386266][ C1] vpanic+0xf8/0x2ac
[ 4.386290][ C1] trace_suspend_resume+0x0/0x7c
[ 4.386314][ C1] add_taint+0x0/0xbc
[ 4.386342][ C1] arm64_serror_panic+0x70/0x80
[ 4.386364][ C1] do_serror+0x3c/0x74
[ 4.386384][ C1] el1h_64_error_handler+0x34/0x50
[ 4.386414][ C1] el1h_64_error+0x6c/0x70
[ 4.386436][ C1] el1_abort+0x34/0x68 (P)
[ 4.386462][ C1] el1h_64_sync_handler+0x50/0xac
[ 4.386490][ C1] el1h_64_sync+0x6c/0x70
[ 4.386511][ C1] xhci_portsc_readl+0x4/0x1c (P)
[ 4.386538][ C1] usb_hcd_submit_urb+0x48c/0xa3c
[ 4.386565][ C1] usb_submit_urb+0x1e0/0x650
[ 4.386593][ C1] usb_start_wait_urb+0x74/0x17c
[ 4.386621][ C1] usb_control_msg+0xc4/0x140
[ 4.386648][ C1] hub_port_reset+0x118/0x9c0
[ 4.386672][ C1] hub_port_init+0xb4/0xd84
[ 4.386694][ C1] hub_event+0x10e4/0x1a5c
[ 4.386718][ C1] process_one_work+0x16c/0x3d4
[ 4.386752][ C1] worker_thread+0x2c4/0x3f4
[ 4.386773][ C1] kthread+0x130/0x1ec
[ 4.386803][ C1] ret_from_fork+0x10/0x20
[ 4.386829][ C1] SMP: stopping secondary CPUs
[ 4.386854][ C1] Kernel Offset: disabled
[ 4.386861][ C1] CPU features: 0x200000,10410001,00008000,0400420b
[ 4.386876][ C1] Memory Limit: none
[ 4.414238][ C1] ---[ end Kernel panic - not syncing: Asynchronous SError Interrupt ]---
>---
>base-commit: 18f7fcd5e69a04df57b563360b88be72471d6b62
>change-id: 20260203-rockchip-usbdp-cleanup-5b59dfb561a3
>
>Best regards,
>--
>Sebastian Reichel <sebastian.reichel@collabora.com>
>
>
>_______________________________________________
>Linux-rockchip mailing list
>Linux-rockchip@lists.infradead.org
>http://lists.infradead.org/mailman/listinfo/linux-rockchip
next prev parent reply other threads:[~2026-02-04 12:10 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-03 18:41 [PATCH " Sebastian Reichel
2026-02-03 18:41 ` [PATCH 1/7] phy: rockchip: usbdp: Amend SSC modulation deviation Sebastian Reichel
2026-02-03 18:41 ` [PATCH 2/7] phy: rockchip: usbdp: Fix LFPS detect threshold control Sebastian Reichel
2026-02-03 18:41 ` [PATCH 3/7] phy: rockchip: usbdp: Add missing mode_change update Sebastian Reichel
2026-02-03 18:41 ` [PATCH 4/7] phy: rockchip: usbdp: Support single-lane DP Sebastian Reichel
2026-02-03 18:41 ` [PATCH 5/7] phy: rockchip: usbdp: Rename DP lane functions Sebastian Reichel
2026-02-03 18:41 ` [PATCH 6/7] phy: rockchip: usbdp: Use FIELD_PREP_WM16_CONST Sebastian Reichel
2026-02-03 18:41 ` [PATCH 7/7] phy: rockchip: usbdp: Cleanup DP lane selection function Sebastian Reichel
2026-02-04 12:09 ` Andy Yan [this message]
2026-02-13 14:37 ` [PATCH 0/7] phy: rockchip: usbdp: Fixes, DP 1-lane support and cleanups Sebastian Reichel
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