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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-af91a22057esm1281409966b.115.2025.08.07.04.06.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 07 Aug 2025 04:06:57 -0700 (PDT) Message-ID: <4aaa09b8-e944-4d66-a681-a3659fc203cc@oss.qualcomm.com> Date: Thu, 7 Aug 2025 13:06:55 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1] ufs: ufs-qcom: Align programming sequence of Shared ICE for UFS controller v5 To: Manivannan Sadhasivam Cc: Palash Kambar , James.Bottomley@hansenpartnership.com, martin.petersen@oracle.com, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, quic_nitirawa@quicinc.com References: <20250806063409.21206-1-quic_pkambar@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=Q+XS452a c=1 sm=1 tr=0 ts=689488d4 cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=COk6AnOGAAAA:8 a=ftMxJ0LbfJfX_HPbJzQA:9 a=QEXdDO2ut3YA:10 a=uxP6HrT_eTzRwkO_Te1X:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: mOo794moPy6mA67ecnkVDjH-Vxfj6ACg X-Proofpoint-ORIG-GUID: mOo794moPy6mA67ecnkVDjH-Vxfj6ACg X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODA3MDA2OSBTYWx0ZWRfX6dqn5F9VQvZr CSXsdLnMv5L8gzEBgnqnUG/74plVMFLJG+Xkt0NVyUVkeInK9XhdZ7IdmXQNwkD1GqEL5wduh+U nJUEHuMckaYJ5ACVil+SukTGEe3sV2E1OFnsz6R0dCEgJXX+PBKMD2wODIOxOr+HfmqFlxsIfaa Qt2r0NOHxACjtvk5WKHKY+j3vD2t8/aqyGj12pLbk1v+rFQYOh8eUh4svXalG1tOCkNKNUsHvtb wGgSGp3UgDAaEp45SBukITbFbYXFGfTGQ6VuNhM7jHj+/81ajgclWpiPTHz6dmkzCWmXFou9f+n KSGLXM0RpGby/q7ikB6aYa6oYvXqCGDO+6d+LgGrtGjCDoEzo8F8NQX+lSYWtOVuwufMtd5NiDI lxwqKMRq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-07_02,2025-08-06_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 bulkscore=0 suspectscore=0 malwarescore=0 spamscore=0 impostorscore=0 phishscore=0 priorityscore=1501 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508070069 On 8/6/25 7:39 PM, Manivannan Sadhasivam wrote: > On Wed, Aug 06, 2025 at 02:56:43PM GMT, Konrad Dybcio wrote: >> On 8/6/25 1:14 PM, Manivannan Sadhasivam wrote: >>> On Wed, Aug 06, 2025 at 12:04:09PM GMT, Palash Kambar wrote: >>>> Disable of AES core in Shared ICE is not supported during power >>>> collapse for UFS Host Controller V5.0. >>>> >>>> Hence follow below steps to reset the ICE upon exiting power collapse >>>> and align with Hw programming guide. >>>> >>>> a. Write 0x18 to UFS_MEM_ICE_CFG >>>> b. Write 0x0 to UFS_MEM_ICE_CFG >>>> >>>> Signed-off-by: Palash Kambar >>>> --- >> >> [...] >> >>> >>>> + ufshcd_readl(hba, UFS_MEM_ICE); >>>> + ufshcd_writel(hba, 0x0, UFS_MEM_ICE); >>>> + ufshcd_readl(hba, UFS_MEM_ICE); >>> >>> Why do you need readl()? Writes to device memory won't get reordered. >> >> I'm not sure if we need a delay between them, otherwise they'll happen >> within a couple cycles of each other which may not be enough since this >> is a synchronous reset and the clock period is 20-50ns when running at >> XO (19.2 / 38.4 MHz) rate >> > > IIUC, the second register write is just reenabling the mask, so there is no Yes > delay required between these two writes. If that's not true, and if there is a Yes > delay required, then do: We don't know if it's required, the HPG makes no effort to clarify it, but I would expect it's probably not instantaneous > > ufshcd_writel(0x18); > ufshcd_readl(); > usleep()/msleep(); > ufshcd_write(0x0); You'd still need the second readl to make sure the de-assertion has gone through before proceeding Konrad