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From: Yunfeng Ye <yeyunfeng@huawei.com>
To: <catalin.marinas@arm.com>, <will@kernel.org>,
	<wangkefeng.wang@huawei.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Cc: <wuxu.wu@huawei.com>, Hewenliang <hewenliang4@huawei.com>
Subject: [PATCH] arm64: mm: Use asid2idx() and asid feature macro for cleanup
Date: Thu, 28 Oct 2021 20:27:23 +0800	[thread overview]
Message-ID: <4aaabf1b-00c3-3365-e371-9d97dc0c06ab@huawei.com> (raw)

Use asid2idx() and asid feature macro for cleanup.

No functional change.

Signed-off-by: Yunfeng Ye <yeyunfeng@huawei.com>
---
 arch/arm64/mm/context.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c
index cd72576ae2b7..076f14a75bd5 100644
--- a/arch/arm64/mm/context.c
+++ b/arch/arm64/mm/context.c
@@ -50,10 +50,10 @@ static u32 get_cpu_asid_bits(void)
 		pr_warn("CPU%d: Unknown ASID size (%d); assuming 8-bit\n",
 					smp_processor_id(),  fld);
 		fallthrough;
-	case 0:
+	case ID_AA64MMFR0_ASID_8:
 		asid = 8;
 		break;
-	case 2:
+	case ID_AA64MMFR0_ASID_16:
 		asid = 16;
 	}

@@ -162,7 +162,7 @@ static u64 new_context(struct mm_struct *mm)
 	u64 generation = atomic64_read(&asid_generation);

 	if (asid != 0) {
-		u64 newasid = generation | (asid & ~ASID_MASK);
+		u64 newasid = generation | asid2idx(asid);

 		/*
 		 * If our current ASID was active during a rollover, we
@@ -306,7 +306,7 @@ unsigned long arm64_mm_context_get(struct mm_struct *mm)
 out_unlock:
 	raw_spin_unlock_irqrestore(&cpu_asid_lock, flags);

-	asid &= ~ASID_MASK;
+	asid = asid2idx(asid);

 	/* Set the equivalent of USER_ASID_BIT */
 	if (asid && arm64_kernel_unmapped_at_el0())
-- 
2.27.0

             reply	other threads:[~2021-10-28 12:27 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-28 12:27 Yunfeng Ye [this message]
2021-12-06 16:23 ` Catalin Marinas
2021-12-07  2:21   ` Yunfeng Ye
2021-12-07 10:50     ` Catalin Marinas

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