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Wed, 05 Aug 2026 01:20:43 -0700 (PDT) X-Received: by 2002:a17:902:d486:b0:2ca:53f7:3c69 with SMTP id d9443c01a7336-2d08aa64855mr95187635ad.9.1785918043312; Wed, 05 Aug 2026 01:20:43 -0700 (PDT) Received: from [10.218.31.237] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2d0aa4d8af6sm14454145ad.74.2026.08.05.01.20.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 05 Aug 2026 01:20:42 -0700 (PDT) Message-ID: <4ad24e6f-03f2-47a5-be82-33b51bba1e40@oss.qualcomm.com> Date: Wed, 5 Aug 2026 13:50:38 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: dts: qcom: shikra: Add qcom,vmid to BAM-DMA node To: Bjorn Andersson Cc: Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, chris.lew@oss.qualcomm.com, Deepak Kumar Singh References: <20260714-b4-qcom-shikra-dts-bam-dmux-vmid-ext-v1-1-5b19da8d7735@oss.qualcomm.com> Content-Language: en-US From: Vishnu Santhosh In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: DhVjs_jdoFiSq1NpyKLlSZaEN1GjV2ST X-Authority-Analysis: v=2.4 cv=Co+PtH4D c=1 sm=1 tr=0 ts=6a72f25c cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=oVj3lZxTCizMYWdbe9AA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwODA1MDA2NCBTYWx0ZWRfX2kH2seVQ2zZY Uc4yisgndMA7EQUoTSmKJFT3UDscRV8cUHdzYwlCm08un025sojEgV67EfwkA25pqHdgEQkp2rR pLjB8zUX+au+pWj93eScq9IkyfnTpdo= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODA1MDA2NCBTYWx0ZWRfX2bGFOJJnQOuj IoRMT16LGpYzSVx/qp5klVbHCMGObVNrtvh2VKR/gQ7jTvGr3zm7Ij/umO/JvRL5aIuzovTVc4X StCKX0ggGqxpvbhP/fg2EjZJmh4VG0Bvcod1rlMuFqMbFXG+Ayd1G3moNZbcCz4/rEOrE0ZLFxE f6Pp9wisiBVJnMwO9Q8ega1qJH9G9d115nQRTMagDIFvjLwN3IzNBIVUZlUtFvBMKIll1r3kaCo Msa8NwB1gCr225rFHJyir0sgIIe106N7kAEjAbH4QsmDHOz5YZVo4h+vVrm98Cseqt3ncaK+yLf 50ZrD2gib35YHjESlgPLbYFAaTiwIj9u4Kn3tMGTK+2mv6mL4/RlWfH0fR4sZXQxen8NmQwBVV+ yymmBj8rm2agYF4mCS9p5HosBu6o8X+08DDvBm12NEpsGjfqsp8kG9wIPngaSew7pGN0exDqgSE ulP7NnQJRubCLDsDifQ== X-Proofpoint-GUID: DhVjs_jdoFiSq1NpyKLlSZaEN1GjV2ST X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-05_02,2026-08-04_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 lowpriorityscore=0 clxscore=1015 impostorscore=0 spamscore=0 phishscore=0 bulkscore=0 malwarescore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608050064 On 05-08-2026 09:08 am, Bjorn Andersson wrote: > On Tue, Aug 04, 2026 at 09:49:18PM +0530, Vishnu Santhosh wrote: >> On 31-07-2026 02:49 am, Bjorn Andersson wrote: >>> On Tue, Jul 14, 2026 at 02:01:53PM +0530, Vishnu Santhosh wrote: >>>> On the Qualcomm Shikra SoC the mDSP (VMID 43 / QCOM_SCM_VMID_NAV) is >>>> the AXI master for BAM descriptor FIFO accesses. The XPU enforces >>>> per-region access control; without an SCM assignment granting NAV >>>> access, the first DMA transfer triggers an XPU violation. >>>> >>> I'm a bit puzzled about your plan here. >>> >>> You posted this on July 14th, that's 3 days after I asked you to rebase >>> patch [1]. This patch literally says that [1] is broken and untested. >> The XPU violation itself wasn't visible against the base bam-dmux >> enablement alone. It only showed up once the access-control policy was >> enabled, which happened to land close to when [1] was posted upstream. >> That's why this series followed so soon after. >> > Are you saying that none of the shikra patches were tested with > access-control enabled?! > > Regards, > Bjorn Correct for [1] because access-control wasn't enabled in the Shikra build used at that point. It was enabled afterward, which is when this XPU violation was found. Some context on why this issue is Shikra-specific: A2 BAM (used by BAM-DMUX) sits in the secure domain on this SoC and doesn't support IOMMU Stage-2 translation, so there's no IOMMU domain that can be attached to it. The XPU is the only protection mechanism available. On past targets like msm8916, the same A2 BAM configuration never surfaced this class of issue, so it wasn't something we'd seen before. We are currently discussing with Stephen on the SCM calls on bam driver side to fix the violation. Once concluded, will verify and fold the dt changes together with [1]. Thanks, Vishnu