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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f62594985bsm7594334a12.74.2025.04.23.07.57.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 23 Apr 2025 07:57:17 -0700 (PDT) Message-ID: <4b1f9228-2600-4d97-a60e-9099878b3f2a@oss.qualcomm.com> Date: Wed, 23 Apr 2025 16:57:14 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/4] drm/msm/a6xx: Get HBB dynamically, if available To: Rob Clark , Konrad Dybcio Cc: Akhil P Oommen , Connor Abbott , Konrad Dybcio , Bjorn Andersson , Kees Cook , "Gustavo A. R. Silva" , Sean Paul , Abhinav Kumar , Dmitry Baryshkov , David Airlie , Simona Vetter , Dmitry Baryshkov , Marijn Suijten , linux-kernel , linux-arm-msm , linux-hardening@vger.kernel.org, dri-devel , freedreno@lists.freedesktop.org References: <20250410-topic-smem_dramc-v2-0-dead15264714@oss.qualcomm.com> <20250410-topic-smem_dramc-v2-3-dead15264714@oss.qualcomm.com> <20911703-ab4e-4eb2-8611-294730a06d2f@quicinc.com> <1282bf58-e431-4a07-97e5-628437e7ce5f@quicinc.com> <16845de2-a40a-4e3d-b3aa-c91e7072b57f@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: 6TFm8YwlOOZ4j9T9gpzlzavZNNyTfyAP X-Proofpoint-ORIG-GUID: 6TFm8YwlOOZ4j9T9gpzlzavZNNyTfyAP X-Authority-Analysis: v=2.4 cv=Fv0F/3rq c=1 sm=1 tr=0 ts=6808ffcf cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=EUspDBNiAAAA:8 a=COk6AnOGAAAA:8 a=INHOtyMNgn4pQtdJY3IA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNDIzMDEwNSBTYWx0ZWRfX2IYZbOw+14EF zIuOG53hCto/VsDB+cuRcr77PS/SMyYQAC60E41ybmkHuvi4m8Re6HrdAPZdEQeFONmqYmgLvLF jgQ50zMSywmS1cTpKOua2XIng5HtXbOO0reAw/RBNfciHLdVnJw17aUjSeVS62FwuO5wrnOGL92 7qfW/Gl5BlnJaqp6YweWBChPJhkhQqb0fM6FPt3HCNYBGVWUj9mqE9sCZrkqT/lr5Uod+zW4jFZ iWPwvbVdeHbnzX+OJQ+3mQvaOnhQOlgHq5q/wM0qePmk/pVL1JfMQ4iKw3HvCxK/K73lLEtjiSq Yhw24fd4tMeIVASbvgza9SWgIk1bKaWI7M5FWDZ4Ex02kXmyF6esL3CvouvoiBI0TnovRSbtIUB f5zwpZlb7z6fYIhekj3c1wZw1WUZZNnQl3Sr68D0cW3WWUfN859CNDxHEawmNYPPbkEdCUPN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.680,FMLib:17.12.80.40 definitions=2025-04-23_08,2025-04-22_01,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxscore=0 malwarescore=0 mlxlogscore=999 priorityscore=1501 suspectscore=0 adultscore=0 bulkscore=0 clxscore=1015 spamscore=0 lowpriorityscore=0 phishscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2504070000 definitions=main-2504230105 On 4/23/25 4:55 PM, Rob Clark wrote: > On Tue, Apr 22, 2025 at 4:57 PM Konrad Dybcio > wrote: >> >> On 4/21/25 10:13 PM, Rob Clark wrote: >>> On Fri, Apr 18, 2025 at 9:00 AM Akhil P Oommen wrote: >>>> >>>> On 4/18/2025 6:40 AM, Connor Abbott wrote: >>>>> On Thu, Apr 17, 2025, 1:50 PM Akhil P Oommen wrote: >>>>>> >>>>>> On 4/17/2025 9:02 PM, Connor Abbott wrote: >>>>>>> On Thu, Apr 17, 2025 at 3:45 AM Akhil P Oommen wrote: >>>>>>>> >>>>>>>> On 4/10/2025 11:13 PM, Konrad Dybcio wrote: >>>>>>>>> From: Konrad Dybcio >>>>>>>>> >>>>>>>>> The Highest Bank address Bit value can change based on memory type used. >>>>>>>>> >>>>>>>>> Attempt to retrieve it dynamically, and fall back to a reasonable >>>>>>>>> default (the one used prior to this change) on error. >>>>>>>>> >>>>>>>>> Signed-off-by: Konrad Dybcio >>>>>>>>> --- >>>>>>>>> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 15 ++++++++++++++- >>>>>>>>> 1 file changed, 14 insertions(+), 1 deletion(-) >>>>>>>>> >>>>>>>>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >>>>>>>>> index 06465bc2d0b4b128cddfcfcaf1fe4252632b6777..a6232b382bd16319f20ae5f8f5e57f38ecc62d9f 100644 >>>>>>>>> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >>>>>>>>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >>>>>>>>> @@ -13,6 +13,7 @@ >>>>>>>>> #include >>>>>>>>> #include >>>>>>>>> #include >>>>>>>>> +#include >>>>>>>>> >>>>>>>>> #define GPU_PAS_ID 13 >>>>>>>>> >>>>>>>>> @@ -587,6 +588,8 @@ static void a6xx_set_cp_protect(struct msm_gpu *gpu) >>>>>>>>> >>>>>>>>> static void a6xx_calc_ubwc_config(struct adreno_gpu *gpu) >>>>>>>>> { >>>>>>>>> + int hbb; >>>>>>>>> + >>>>>>>>> gpu->ubwc_config.rgb565_predicator = 0; >>>>>>>>> gpu->ubwc_config.uavflagprd_inv = 0; >>>>>>>>> gpu->ubwc_config.min_acc_len = 0; >>>>>>>>> @@ -635,7 +638,6 @@ static void a6xx_calc_ubwc_config(struct adreno_gpu *gpu) >>>>>>>>> adreno_is_a690(gpu) || >>>>>>>>> adreno_is_a730(gpu) || >>>>>>>>> adreno_is_a740_family(gpu)) { >>>>>>>>> - /* TODO: get ddr type from bootloader and use 2 for LPDDR4 */ >>>>>>>>> gpu->ubwc_config.highest_bank_bit = 16; >>>>>>>>> gpu->ubwc_config.amsbc = 1; >>>>>>>>> gpu->ubwc_config.rgb565_predicator = 1; >>>>>>>>> @@ -664,6 +666,13 @@ static void a6xx_calc_ubwc_config(struct adreno_gpu *gpu) >>>>>>>>> gpu->ubwc_config.highest_bank_bit = 14; >>>>>>>>> gpu->ubwc_config.min_acc_len = 1; >>>>>>>>> } >>>>>>>>> + >>>>>>>>> + /* Attempt to retrieve the data from SMEM, keep the above defaults in case of error */ >>>>>>>>> + hbb = qcom_smem_dram_get_hbb(); >>>>>>>>> + if (hbb < 0) >>>>>>>>> + return; >>>>>>>>> + >>>>>>>>> + gpu->ubwc_config.highest_bank_bit = hbb; >>>>>>>> >>>>>>>> I am worried about blindly relying on SMEM data directly for HBB for >>>>>>>> legacy chipsets. There is no guarantee it is accurate on every chipset >>>>>>>> and every version of firmware. Also, until recently, this value was >>>>>>>> hardcoded in Mesa which matched the value in KMD. >>>>>>> >>>>>>> To be clear about this, from the moment we introduced host image >>>>>>> copies in Mesa we added support for querying the HBB from the kernel, >>>>>>> explicitly so that we could do what this series does without Mesa ever >>>>>>> breaking. Mesa will never assume the HBB unless the kernel is too old >>>>>>> to support querying it. So don't let Mesa be the thing that stops us >>>>>>> here. >>>>>> >>>>>> Thanks for clarifying about Mesa. I still don't trust a data source that >>>>>> is unused in production. >>>>> >>>>> Fair enough, I'm not going to argue with that part. Just wanted to >>>>> clear up any confusion about Mesa. >>>>> >>>>> Although, IIRC kgsl did set different values for a650 depending on >>>>> memory type... do you know what source that used? >>>> >>>> KGSL relies on an undocumented devicetree node populated by bootloader >>>> to detect ddrtype and calculates the HBB value based on that. >>> >>> Would it be reasonable to use the smem value, but if we find the >>> undocumented dt property, WARN_ON() if it's value disagrees with smem? >>> >>> That would at least give some confidence, or justified un-confidence >>> about the smem values >> >> The aforementioned value is populated based on the data that this >> driver reads out, and only on the same range of platforms that this >> driver happens to cater to > > Did I understand that correctly to mean that the dt property is based > on the same smem value that you are using? Yes, abl reads it out and modifies the FDT based on what's in there Konrad > In that case, there should > be no argument against using the smem value as the source of truth. > > BR, > -R