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Fri, 5 Sep 2025 04:57:24 -0500 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Fri, 5 Sep 2025 04:57:24 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Fri, 5 Sep 2025 04:57:23 -0500 Received: from [172.24.235.208] (hkshenoy.dhcp.ti.com [172.24.235.208]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 5859vHwl265232; Fri, 5 Sep 2025 04:57:18 -0500 Message-ID: <4bbaefae-1d10-461a-a7a2-61a052241028@ti.com> Date: Fri, 5 Sep 2025 15:27:17 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] dt-bindings: drm/bridge: MHDP8546 bridge binding changes for DSC To: Rob Herring CC: , , , , , , , , , , , , , , , , , , , , References: <20250903111357.2605199-1-h-shenoy@ti.com> <20250903220312.GA2903503-robh@kernel.org> Content-Language: en-US From: Harikrishna Shenoy In-Reply-To: <20250903220312.GA2903503-robh@kernel.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea On 9/4/25 03:33, Rob Herring wrote: > On Wed, Sep 03, 2025 at 04:43:57PM +0530, Harikrishna Shenoy wrote: >> From: Swapnil Jakhade >> >> Add binding changes for DSC(Display Stream Compression) in the MHDP8546 >> DPI/DP bridge. >> >> Signed-off-by: Swapnil Jakhade >> Signed-off-by: Harikrishna Shenoy >> --- >> .../bindings/display/bridge/cdns,mhdp8546.yaml | 11 +++++++---- >> 1 file changed, 7 insertions(+), 4 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml >> index c2b369456e4e..6e749c002669 100644 >> --- a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml >> +++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml >> @@ -27,6 +27,8 @@ properties: >> Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs. >> - description: >> Register block of mhdptx sapb registers. >> + - description: >> + Register block for mhdptx DSC encoder registers. >> >> reg-names: >> minItems: 1 >> @@ -34,6 +36,7 @@ properties: >> - const: mhdptx >> - const: j721e-intg >> - const: mhdptx-sapb >> + - const: mhdptx-dsc > 'mhdptx' is redundant. Don't continue that pattern. Just 'dsc'. so sequence should be mhdptx, j721e-intg, mhdptx-sapb, dsc? > >> >> clocks: >> maxItems: 1 >> @@ -100,18 +103,18 @@ allOf: >> properties: >> reg: >> minItems: 2 >> - maxItems: 3 >> + maxItems: 4 >> reg-names: >> minItems: 2 >> - maxItems: 3 >> + maxItems: 4 >> else: >> properties: >> reg: >> minItems: 1 >> - maxItems: 2 >> + maxItems: 3 >> reg-names: >> minItems: 1 >> - maxItems: 2 >> + maxItems: 3 > Have you tested this works? While it might work for TI with the > j721e-intg registers in the middle, it won't work for platforms without > them. You're going to have to have 2 lists of reg-names. > > Rob > I will add two lists one with and one without j721e-integ in the 'if' condtional