Re: [PATCH v2 0/3] Add edp reference clock for lemans

[Ritesh Kumar <quic_riteshk@quicinc.com>]

On 10/13/2025 6:04 PM, Dmitry Baryshkov wrote:
> On Mon, Oct 13, 2025 at 04:18:03PM +0530, Ritesh Kumar wrote:
> > On lemans chipset, edp reference clock is being voted by ufs mem phy
> > (ufs_mem_phy: phy@1d87000). But after commit 77d2fa54a9457
> > ("scsi: ufs: qcom : Refactor phy_power_on/off calls") edp reference
> > clock is getting turned off, leading to below phy poweron failure on
> > lemans edp phy.
>
> How does UFS turn on eDP reference clock?

In lemans, GCC_EDP_REF_CLKREF_EN is voted as qref clock in ufs_mem_phy.


ufs_mem_phy: phy@1d87000 {
     compatible = "qcom,sa8775p-qmp-ufs-phy";
     reg = <0x0 0x01d87000 0x0 0xe10>;
     /*
      * Yes, GCC_EDP_REF_CLKREF_EN is correct in qref. It
      * enables the CXO clock to eDP *and* UFS PHY.
      */
     clocks = <&rpmhcc RPMH_CXO_CLK>,
              <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
              <&gcc GCC_EDP_REF_CLKREF_EN>;
     clock-names = "ref", "ref_aux", "qref";

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