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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ae6e82e5309sm991511666b.173.2025.07.15.03.50.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 15 Jul 2025 03:50:46 -0700 (PDT) Message-ID: <4be1ebb7-1dc7-49e0-aa5d-621f023b3853@oss.qualcomm.com> Date: Tue, 15 Jul 2025 12:50:44 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH RFC 1/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5 To: Krzysztof Kozlowski , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250714-b4-sm8750-iris-dts-v1-0-93629b246d2e@linaro.org> <20250714-b4-sm8750-iris-dts-v1-1-93629b246d2e@linaro.org> <5dd36649-821c-450e-bdcc-871735d10059@linaro.org> <15b8b9e0-a211-4102-9b68-994c8ab50a7a@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzE1MDA5OCBTYWx0ZWRfX7IQbAEb/TU83 6Zf8BP9aiUsLRlM+aPVfqYmLeovJCUg/OLpj96eBkyRRHc/gF1AzASeXP33vVO3dP3YpkcDbvLO ffqsuZUrWcqOVo+LcnmCzLdH03vdbogysThfxBOUs4z3S99FwDf2GG/R34sxHTO2+GSk+hHEocE njTIs64J1DE0GDvPCF4yC5p3Q5eHpRO1cVqcqQF2ruveH2AP5IYtFxsfrbHn7UCs+PFaK5VfmND qLr45k/Zb+BZqOmuMwZLBHlOA4xhhbEMzdgUhSNUjkzW6WVNdIFlRMJ+WtXxRyLFxgJ8LvvMDdS QUEIzbblCl8EephMK+s1gDmW7Uf0wQ+denloQ2JFGGPgS2h2stlvGlNLwDR/3CnOfFuIbM0x3bO ZXsBorrY86M+rU0PFrBgf7ddjoj8GaGUwHo35Sgc21Xpot8x2TRrd4TAdUPNrdQgvF9o5Oyc X-Proofpoint-ORIG-GUID: vuXZHDk-860IXSAlaSS1j0mQ3sphFoVw X-Proofpoint-GUID: vuXZHDk-860IXSAlaSS1j0mQ3sphFoVw X-Authority-Analysis: v=2.4 cv=f59IBPyM c=1 sm=1 tr=0 ts=68763288 cx=c_pps a=WeENfcodrlLV9YRTxbY/uA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=KBVr0NYvNlN9pVTpkDkA:9 a=QEXdDO2ut3YA:10 a=kacYvNCVWA4VmyqE58fU:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-07-15_01,2025-07-14_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 lowpriorityscore=0 malwarescore=0 spamscore=0 mlxscore=0 bulkscore=0 suspectscore=0 impostorscore=0 adultscore=0 priorityscore=1501 mlxlogscore=999 phishscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507150098 On 7/15/25 12:34 PM, Krzysztof Kozlowski wrote: > On 15/07/2025 12:09, Konrad Dybcio wrote: >> On 7/15/25 12:07 PM, Krzysztof Kozlowski wrote: >>> On 15/07/2025 11:32, Krzysztof Kozlowski wrote: >>>> On 14/07/2025 15:55, Krzysztof Kozlowski wrote: >>>>> + >>>>> + videocc: clock-controller@aaf0000 { >>>>> + compatible = "qcom,sm8750-videocc"; >>>>> + reg = <0x0 0x0aaf0000 0x0 0x10000>; >>>>> + clocks = <&bi_tcxo_div2>, >>>>> + <&gcc GCC_VIDEO_AHB_CLK>; >>>>> + power-domains = <&rpmhpd RPMHPD_MMCX>; >>>> >>>> This is incomplete, need second power domain and I did not check against >>>> qcom,sm8750-videocc schema before sending. I will send a v2 a bit later >>>> (maybe some reviews pop up). >>> >>> Heh, no. The DTS here is correct. The videocc bindings are not correct >>> (and that's not my patch). >> >> Well, you want two power domains here in either case.. > Are you sure? My point was one is correct and downstream confirms that > in their bindings (which is a poor argument, I know). Which one would be > the second? MM? We don't have such... Historically clock controllers used a pair of CX/MX, with CX powering the "meat" and MX powering the PLLs (& retention logic, IIUC). Over time, CX was split into multiple usecase-specific domains (like GFX), and we now have MMCX (or MM_CX - multimedia CX) for multimedia hw specifically In the downstream tree you're looking at, sun-regulators.dtsi aliases VDD_MMCX_LEVEL as VDD_MM_LEVEL for $reasons, which is admittedly a little confusing MX has similarly been split into MXA (MX-Always [on]) and MXC (MX-Collapsible). For Venus, you want the latter, as the hardware is not crucial to the functioning of the SoC (the connection is of course physically determined at SoC design stage, but it's a good heuristic to keep in mind). Konrad