Re: [PATCH 1/2] dt-bindings: interconnect: qcom,shikra-epss-l3: Add EPSS L3 DT binding

[Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>]

On 6/2/2026 5:29 PM, Krzysztof Kozlowski wrote:
> On 02/06/2026 11:27, Raviteja Laggyshetty wrote:
>>
>>
>> On 5/30/2026 4:38 PM, Krzysztof Kozlowski wrote:
>>> On Sun, May 24, 2026 at 06:03:35PM +0000, Raviteja Laggyshetty wrote:
>>>> +  '#interconnect-cells':
>>>> +    const: 1
>>>> +
>>>
>>> I do not see any differences against OSM L3 binding. Why isn't this
>>> device there?
>>>
>>
>> The EPSS L3 on Shikra is similar to EPSS/OSM L3 on other Qualcomm SoCs,
>> but supports only twelve LUT entries. Due to this hardware difference,
>> the generic compatibles are not applicable, so a new SoC specific
>> binding is introduced.
>>
> 
> This I understood, but the binding would be exactly the same, no? Kind
> of repeating the question....
> 
Yes, Though the hardware is slightly different, it can be still described 
using the existing qcom,osm-l3.yaml binding and can be added as OneOf the 
compatible enum in the properties.

Just to differentiate the hardware difference with existing L3, separate 
SoC specific binding is added.


> Best regards,
> Krzysztof