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[2001:14ba:a073:af00::4c9]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5a2c43b3597sm173211e87.23.2026.03.31.23.47.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 31 Mar 2026 23:47:24 -0700 (PDT) Message-ID: <4cb29e7a-9a75-4f8a-9036-c96e9190b7b0@oss.qualcomm.com> Date: Wed, 1 Apr 2026 09:47:22 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 17/38] drm/msm/dp: add support to send ACT packets for MST To: Yongxing Mou Cc: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Abhinav Kumar References: <20250825-msm-dp-mst-v3-0-01faacfcdedd@oss.qualcomm.com> <20250825-msm-dp-mst-v3-17-01faacfcdedd@oss.qualcomm.com> <46d97aec-9f46-42bd-8725-2c236ffd13ba@oss.qualcomm.com> Content-Language: en-US From: Dmitry Baryshkov In-Reply-To: <46d97aec-9f46-42bd-8725-2c236ffd13ba@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDAxMDA1OCBTYWx0ZWRfXzod+KFLN+HXp zK7DFLQp2JKSwH0Q48U3eZk36F+aIO6xB9rjEPCXJno8v7K/3t7ntsVFtBEPFQoGEV5fUpFe7st p5Mwgtz/FemsPrNoEWCISp7HNP8NqVekzrotNNZzQ1rnKxg2kF4JToqmpjrF0kSV/TJioSDPhMe eDzK6iYSATOjbnU1xVN9qbLPw4a5KJsH+K9ZsnGy1uImafcw5f46Brp3TDnvJ+8zkkzHleiO6SL qSjouvpb4a3a2FE9EIItald4rUYSjb15bXaAYwc+S77A0z/XASZdHBnzOyqXimm2kQiEQdId5QP jyzhOMThcUiyocnL/YB8Yw4LU70UgpaMJpwlfUM3MsAKEjosI4kI6aFC/GxsyUP0i4kO4VrnfaI Pxs+HRpwywWR/DmAN2t59ODAv+oV2X65Bjsw+DsAjfZxyqg3FikfUlyT1unDlteWvpqMV0NPEKb 97pKB67MEFLN+p319uw== X-Authority-Analysis: v=2.4 cv=G4ER0tk5 c=1 sm=1 tr=0 ts=69ccbf7f cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=hEYASa3n4XitINDXwYgA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uxP6HrT_eTzRwkO_Te1X:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: 3MOiEtcG_fm6wXuOeffk0_MJunB04BGX X-Proofpoint-ORIG-GUID: 3MOiEtcG_fm6wXuOeffk0_MJunB04BGX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-01_02,2026-03-31_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 clxscore=1015 priorityscore=1501 malwarescore=0 adultscore=0 impostorscore=0 spamscore=0 phishscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2604010058 On 01/04/2026 09:44, Yongxing Mou wrote: > > > On 8/26/2025 5:10 AM, Dmitry Baryshkov wrote: >> On Mon, Aug 25, 2025 at 10:16:03PM +0800, Yongxing Mou wrote: >>> From: Abhinav Kumar >>> >>> Whenever virtual channel slot allocation changes, the DP >>> source must send the action control trigger sequence to notify >>> the sink about the same. This would be applicable during the >>> start and stop of the pixel stream. Add the infrastructure >>> to be able to send ACT packets for the DP controller when >>> operating in MST mode. >>> >>> Signed-off-by: Abhinav Kumar >>> Signed-off-by: Yongxing Mou >>> --- >>>   drivers/gpu/drm/msm/dp/dp_ctrl.c    | 39 ++++++++++++++++++++++++++ >>> +++++++++-- >>>   drivers/gpu/drm/msm/dp/dp_ctrl.h    |  4 ++-- >>>   drivers/gpu/drm/msm/dp/dp_display.c |  3 ++- >>>   drivers/gpu/drm/msm/dp/dp_display.h |  1 + >>>   drivers/gpu/drm/msm/dp/dp_reg.h     |  2 ++ >>>   5 files changed, 44 insertions(+), 5 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/ >>> dp/dp_ctrl.c >>> index >>> 608a1a077301b2ef3c77c271d873bb4364abe779..16e5ed58e791971d5dca3077cbb77bfcc186505a 100644 >>> --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c >>> +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c >>> @@ -142,6 +142,7 @@ struct msm_dp_ctrl_private { >>>       bool core_clks_on; >>>       bool link_clks_on; >>>       bool stream_clks_on[DP_STREAM_MAX]; >>> +    bool mst_active; >>>   }; >>>   static inline u32 msm_dp_read_ahb(const struct msm_dp_ctrl_private >>> *ctrl, u32 offset) >>> @@ -227,6 +228,32 @@ static int msm_dp_aux_link_configure(struct >>> drm_dp_aux *aux, >>>       return 0; >>>   } >>> +void msm_dp_ctrl_mst_send_act(struct msm_dp_ctrl *msm_dp_ctrl) >>> +{ >>> +    struct msm_dp_ctrl_private *ctrl; >>> +    bool act_complete; >>> + >>> +    ctrl = container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, >>> msm_dp_ctrl); >>> + >>> +    if (!ctrl->mst_active) >>> +        return; >>> + >>> +    msm_dp_write_link(ctrl, REG_DP_MST_ACT, 0x1); >>> +    /* make sure ACT signal is performed */ >>> +    wmb(); >>> + >>> +    msleep(20); /* needs 1 frame time */ >>> + >>> +    act_complete = msm_dp_read_link(ctrl, REG_DP_MST_ACT); >>> + >>> +    if (!act_complete) >>> +        drm_dbg_dp(ctrl->drm_dev, "mst ACT trigger complete >>> SUCCESS\n"); >>> +    else >>> +        drm_dbg_dp(ctrl->drm_dev, "mst ACT trigger complete failed\n"); >> >> Shouldn't it return an error if the register dind't latch? Also, >> shouldn't we set mst_active only if the write went through? >> > In some cases, MST still works correctly even when the ACT trigger > fails; here refer to the downstream implementation. I don't think it is a good idea. It would be better to signal this to the user and rollback the MST configuration (as in the case of any other error). I will change my mind if you point out i915, amdgpu or nouveau drivers ignoring the ACT issues. -- With best wishes Dmitry