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Wed, 10 Jul 2024 21:47:56 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.11.0-alpha0-568-g843fbadbe-fm-20240701.003-g843fbadb Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <4cb980c8-4b96-4ed0-85af-9baa1b7ef30c@app.fastmail.com> In-Reply-To: References: <20240612-mips_ieee754_emul-v3-1-2c21b450abdb@flygoat.com> <9cc26415-9cbc-47fa-a132-7d8c000874a4@app.fastmail.com> <7797a7b2-1bb2-4c45-b65d-678f685dfa3d@app.fastmail.com> Date: Thu, 11 Jul 2024 09:47:36 +0800 From: "Jiaxun Yang" To: "Thomas Bogendoerfer" Cc: "Maciej W. Rozycki" , "Jonathan Corbet" , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, "linux-mips@vger.kernel.org" , =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= Subject: Re: [PATCH v3] MIPS: Implement ieee754 NAN2008 emulation mode Content-Type: text/plain;charset=utf-8 Content-Transfer-Encoding: quoted-printable =E5=9C=A82024=E5=B9=B47=E6=9C=8810=E6=97=A5=E4=B8=83=E6=9C=88 =E4=B8=8B=E5= =8D=883:36=EF=BC=8CThomas Bogendoerfer=E5=86=99=E9=81=93=EF=BC=9A > On Wed, Jul 10, 2024 at 01:34:41PM +0800, Jiaxun Yang wrote: >>=20 >>=20 >> =E5=9C=A82024=E5=B9=B47=E6=9C=889=E6=97=A5=E4=B8=83=E6=9C=88 =E4=B8=8B= =E5=8D=884:55=EF=BC=8CThomas Bogendoerfer=E5=86=99=E9=81=93=EF=BC=9A >> > On Fri, Jun 28, 2024 at 01:33:06AM +0100, Jiaxun Yang wrote: >> >>=20 >> >>=20 >> >> =E5=9C=A82024=E5=B9=B46=E6=9C=8827=E6=97=A5=E5=85=AD=E6=9C=88 =E4=B8= =8B=E5=8D=888:54=EF=BC=8CMaciej W. Rozycki=E5=86=99=E9=81=93=EF=BC=9A >> >> > On Thu, 27 Jun 2024, Jiaxun Yang wrote: >> >> > >> >> >> >> @@ -318,6 +318,10 @@ void mips_set_personality_nan(struct ar= ch_elf_state *state) >> >> >> >> t->thread.fpu.fcr31 =3D c->fpu_csr31; >> >> >> >> switch (state->nan_2008) { >> >> >> >> case 0: >> >> >> >> + if (!(c->fpu_msk31 & FPU_CSR_NAN2008)) >> >> >> >> + t->thread.fpu.fcr31 &=3D ~FPU_CSR_NAN2008; >> >> >> >> + if (!(c->fpu_msk31 & FPU_CSR_ABS2008)) >> >> >> >> + t->thread.fpu.fcr31 &=3D ~FPU_CSR_ABS2008; >> >> >> > >> >> >> > why is this needed? >> >> >>=20 >> >> >> Because t->thread.fpu.fcr31 comes from c->fpu_csr31, in this ca= se we the default >> >> >> value of c->fpu_csr31 is read from hardware and we don't know w= hat would that be. >> >> > >> >> > But it has always been like this. What has changed with your p= atch that=20 >> >> > you need to mask the bit out now? >> >>=20 >> >> After this patch kernel's copy of t->thread.fpu.fcr31 can disagree= with hardware. >> >> When disagree happens, we trigger emulation. >> >>=20 >> >> Before that patch for nan legacy binary running on nan2008 CPU t->= thread.fpu.fcr31 >> >> will still be nan2008 (for ieee754=3Drelaxed) so that's not releva= nt. >> > >> > I'm considering to apply your patch, how much testing/verification = did >> > this patch see ? Do have some test binaries ? >>=20 >> It has been tested against Debian rootfs. There is no need to test ag= aint special binary, >> but you need NaN2008 hardware such as Loongson 3A4000. > > that's just one case, what about NaN2008 binaries on a legacy MIPS CPU= ? Boot tested CIP United's NaN2008 Debian port, works good so far [1]. [1]: http://repo.oss.cipunited.com/debian/README.nan2008.txt Thanks - Jiaxun > > Thomas. > > --=20 > Crap can work. Given enough thrust pigs will fly, but it's not necessa= rily a > good idea. [ RFC1925, 2= .3 ] --=20 - Jiaxun