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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5c8ca4d7e5dsm1622502a12.61.2024.10.04.02.23.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 04 Oct 2024 02:23:48 -0700 (PDT) Message-ID: <4cdc804b-6b33-4420-a245-1a6db47e17e3@oss.qualcomm.com> Date: Fri, 4 Oct 2024 11:23:46 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] PCI: qcom: Enable MSI interrupts together with Link up if global IRQ is supported To: Manivannan Sadhasivam , lpieralisi@kernel.org, kw@linux.com Cc: robh@kernel.org, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, quic_qianyu@quicinc.com, Konrad Dybcio References: <20240930134409.168494-1-manivannan.sadhasivam@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20240930134409.168494-1-manivannan.sadhasivam@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: EIVSeZoINEylLWl29gUvARyS177w3zo- X-Proofpoint-ORIG-GUID: EIVSeZoINEylLWl29gUvARyS177w3zo- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 lowpriorityscore=0 priorityscore=1501 suspectscore=0 bulkscore=0 clxscore=1011 impostorscore=0 mlxlogscore=721 malwarescore=0 spamscore=0 phishscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410040068 On 30.09.2024 3:44 PM, Manivannan Sadhasivam wrote: > Currently, if global IRQ is supported by the platform, only the Link up > interrupt is enabled in the PARF_INT_ALL_MASK register. But on some Qcom > platforms like SM8250, and X1E80100, MSIs are getting masked due to this. > They require enabling the MSI interrupt bits in the register to unmask > (enable) the MSIs. > > Even though the MSI interrupt enable bits in PARF_INT_ALL_MASK are > described as 'diagnostic' interrupts in the internal documentation, > disabling them masks MSI on these platforms. Due to this, MSIs were not > reported to be received these platforms while supporting global IRQ. > > So enable the MSI interrupts along with the Link up interrupt in the > PARF_INT_ALL_MASK register if global IRQ is supported. This ensures that > the MSIs continue to work and also the driver is able to catch the Link > up interrupt for enumerating endpoint devices. > > Fixes: 4581403f6792 ("PCI: qcom: Enumerate endpoints based on Link up event in 'global_irq' interrupt") > Reported-by: Konrad Dybcio > Closes: https://lore.kernel.org/linux-pci/9a692c98-eb0a-4d86-b642-ea655981ff53@kernel.org/ > Signed-off-by: Manivannan Sadhasivam > --- Tested-by: Konrad Dybcio # SL7 Konrad