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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-845a3feb775sm1345215b3a.20.2026.06.24.00.47.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 24 Jun 2026 00:47:17 -0700 (PDT) Message-ID: <4cdfb71b-2ef8-4985-8294-c4a29e37faa3@oss.qualcomm.com> Date: Wed, 24 Jun 2026 15:47:12 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v10] Add device-specific reset for Qualcomm devices To: Jose Ignacio Tornos Martinez , bhelgaas@google.com, alex@shazbot.org, mani@kernel.org Cc: jjohnson@kernel.org, linux-pci@vger.kernel.org, linux-wireless@vger.kernel.org, ath11k@lists.infradead.org, ath12k@lists.infradead.org, mhi@lists.linux.dev, linux-kernel@vger.kernel.org References: <20260623183115.1585273-1-jtornosm@redhat.com> From: Baochen Qiang Content-Language: en-US In-Reply-To: <20260623183115.1585273-1-jtornosm@redhat.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Info: AW1haW4tMjYwNjI0MDA2MyBTYWx0ZWRfX5yk5APnvFQzu 1JowwboUbRd3CkRIqdYS+DmXANjmbjtKaT2lo8h05EY8fsCGE/D53hu/NLeH8QGXzaKuBFqU7Mk AK28ke9p21G3g6ZQR9Gtc+CtFHeskNw= X-Proofpoint-GUID: ZvI0QTgJah8bg2YCVR5nNLojqhQVWJCr X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjI0MDA2MyBTYWx0ZWRfXy9CynGsW4Sd7 X7c6QhvnAvDRLCGoU/XfkiRVN0cetjLX++cTpJTDD4DqKLuR7dN/2Kc7daPR7iJTxHUx59ISR66 Rgjw9cMHPD5ZNrSCb/Njkwn3rC4VqOqFWikh3K4MAE1KMEu44lGcPcG36KOuDwJE7O2vKkSOA3w QKGNCQC1ZjeYK/7PsiQA5qVsmrb52ZewTO2Jb7+TmAh5ZmUYF4ZdjAt8Xpanv/0TI2EOjfuzr/t 8TN7D6nCaxIsjHCNYtG5Su3JxtrdX8UQOfSBneQKrBLvr5Tm+XM1st356T3bzy1KPsBBUenQeq4 ++palwYBeWxaym2kcOUW7Tit7gSsywnVAFjoN+m0AVaskXkKz2ZTI3wc60djF/6sot7clr72XQk Hem5LgR6IYcVCxRpH9KgmeTKnRlYdQ== X-Authority-Analysis: v=2.4 cv=UphT8ewB c=1 sm=1 tr=0 ts=6a3b8b86 cx=c_pps a=m5Vt/hrsBiPMCU0y4gIsQw==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=VwQbUJbxAAAA:8 a=20KFwNOVAAAA:8 a=rq6MREiLanR6HC4oPXQA:9 a=QEXdDO2ut3YA:10 a=IoOABgeZipijB_acs4fv:22 X-Proofpoint-ORIG-GUID: ZvI0QTgJah8bg2YCVR5nNLojqhQVWJCr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-24_02,2026-06-23_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 adultscore=0 phishscore=0 spamscore=0 suspectscore=0 malwarescore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2606240063 On 6/24/2026 2:31 AM, Jose Ignacio Tornos Martinez wrote: > Some Qualcomm PCIe devices (WCN6855/WCN7850 WiFi cards, SDX62/SDX65 modems) > lack working reset methods for VFIO passthrough scenarios. These devices > have no FLR capability, advertise NoSoftRst+ (blocking PM reset), and have > broken bus reset. > > The problem manifests in VFIO passthrough scenarios: > > - WCN6855 (17cb:1103) and WCN7850 (17cb:1107) WiFi devices: > Normal VM operation works fine, including clean shutdown/reboot. > However, when the VM terminates uncleanly (crash, force-off), VFIO > attempts to reset the device before it can be assigned to another VM. > Without a working reset method, the device remains in an undefined state, > preventing reuse. > > - SDX62/SDX65 (17cb:0308) 5G modems: Never successfully initialize even > on first VM assignment without proper reset capability. > > Add device-specific reset methods using BAR-space hardware reset registers > that exist in these devices: > > - WCN6855/WCN7850 WiFi devices use SoC global reset via BAR0 (sequence from > ath11k/ath12k driver: ath11k_pci_soc_global_reset(), ath11k_pci_sw_reset(), > ath11k_mhi_set_mhictrl_reset()): > - Write/clear reset bit at offset 0x3008 > - Wait for PCIe link recovery (up to 5 seconds) > - Clear MHI controller SYSERR status at offset 0x38 > > - SDX62/SDX65 modem devices use MHI SoC reset via BAR0 (sequence from MHI > driver: mhi_soc_reset(), mhi_pci_reset_prepare()): > - Write reset request to offset 0xb0 > - Wait 2 seconds for reset completion > > These are true hardware reset mechanisms (not power management or firmware > error recovery), providing proper device reset for VFIO scenarios. > > Testing was performed on desktop platforms with M.2 WiFi and modem cards > using M.2-to-PCIe adapters, including extensive force-reset cycling to > verify stability. > > Signed-off-by: Jose Ignacio Tornos Martinez > --- > v10: > - Complete redesign based on maintainer feedback (Manivannan Sadhasivam, > Alex Williamson): use actual hardware reset registers from > device drivers instead of D3hot power cycling > v9: https://lore.kernel.org/all/20260612142638.1243895-1-jtornosm@redhat.com/ > > drivers/pci/quirks.c | 118 +++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 118 insertions(+) > > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c > index 431c021d7414..8ad3f214e520 100644 > --- a/drivers/pci/quirks.c > +++ b/drivers/pci/quirks.c > @@ -4240,6 +4240,121 @@ static int reset_hinic_vf_dev(struct pci_dev *pdev, bool probe) > return 0; > } > > +#define QUALCOMM_WIFI_PCIE_SOC_GLOBAL_RESET 0x3008 > +#define QUALCOMM_WIFI_PCIE_SOC_GLOBAL_RESET_V BIT(0) > +#define QUALCOMM_WIFI_MHISTATUS 0x48 > +#define QUALCOMM_WIFI_MHICTRL 0x38 > +#define QUALCOMM_WIFI_MHICTRL_RESET_MASK 0x2 > + > +/* > + * Qualcomm WiFi device-specific reset using SoC global reset via BAR0 > + * registers. > + */ > +static int reset_qualcomm_wifi(struct pci_dev *pdev, bool probe) > +{ > + bool link_recovered = false; > + unsigned long timeout; > + void __iomem *bar; > + u32 val; > + u16 cmd; > + > + if (probe) > + return 0; > + > + if (pdev->current_state != PCI_D0) > + return -EINVAL; > + > + pci_read_config_word(pdev, PCI_COMMAND, &cmd); > + pci_write_config_word(pdev, PCI_COMMAND, cmd | PCI_COMMAND_MEMORY); > + > + bar = pci_iomap(pdev, 0, 0); > + if (!bar) { > + pci_write_config_word(pdev, PCI_COMMAND, cmd); > + return -ENODEV; > + } > + > + val = ioread32(bar + QUALCOMM_WIFI_PCIE_SOC_GLOBAL_RESET); QUALCOMM_WIFI_PCIE_SOC_GLOBAL_RESET is beyond the first 4K bar area hence requires MHI wakeup before accessing, see [1]. the wakeup callback for WCN6855 is ath11k_pci_bus_wake_up() which calls mhi_device_get_sync(). Not sure how this can be done here. Maybe Mani can provide some hints? [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/net/wireless/ath/ath11k/pcic.c#n216 > + val |= QUALCOMM_WIFI_PCIE_SOC_GLOBAL_RESET_V; > + iowrite32(val, bar + QUALCOMM_WIFI_PCIE_SOC_GLOBAL_RESET); > + ioread32(bar + QUALCOMM_WIFI_PCIE_SOC_GLOBAL_RESET); > + > + msleep(10); > + > + val &= ~QUALCOMM_WIFI_PCIE_SOC_GLOBAL_RESET_V; > + iowrite32(val, bar + QUALCOMM_WIFI_PCIE_SOC_GLOBAL_RESET); > + ioread32(bar + QUALCOMM_WIFI_PCIE_SOC_GLOBAL_RESET); > + > + msleep(10); > + > + timeout = jiffies + msecs_to_jiffies(5000); > + while (time_before(jiffies, timeout)) { > + val = ioread32(bar + QUALCOMM_WIFI_PCIE_SOC_GLOBAL_RESET); > + if (val != 0xffffffff) { > + link_recovered = true; > + break; > + } > + msleep(20); > + } > + > + if (!link_recovered) { > + pci_err(pdev, "PCIe link failed to recover after reset\n"); > + goto out_restore; > + } > + > + /* After SOC_GLOBAL_RESET, MHISTATUS may still have SYSERR bit set > + * and thus need to set MHICTRL_RESET to clear SYSERR. > + */ > + iowrite32(QUALCOMM_WIFI_MHICTRL_RESET_MASK, bar + QUALCOMM_WIFI_MHICTRL); > + ioread32(bar + QUALCOMM_WIFI_MHICTRL); > + > + msleep(10); > + > +out_restore: > + pci_iounmap(pdev, bar); > + pci_write_config_word(pdev, PCI_COMMAND, cmd); > + > + return link_recovered ? 0 : -ETIMEDOUT; > +} > + > +#define MHI_SOC_RESET_REQ_OFFSET 0xb0 > +#define MHI_SOC_RESET_REQ BIT(0) > + > +/* > + * Qualcomm modem device-specific reset using MHI SoC reset via BAR0 > + * register. > + */ > +static int reset_qualcomm_modem(struct pci_dev *pdev, bool probe) > +{ > + void __iomem *bar; > + u16 cmd; > + > + if (probe) > + return 0; > + > + if (pdev->current_state != PCI_D0) > + return -EINVAL; > + > + pci_read_config_word(pdev, PCI_COMMAND, &cmd); > + pci_write_config_word(pdev, PCI_COMMAND, cmd | PCI_COMMAND_MEMORY); > + > + bar = pci_iomap(pdev, 0, 0); > + if (!bar) { > + pci_write_config_word(pdev, PCI_COMMAND, cmd); > + return -ENODEV; > + } > + > + iowrite32(MHI_SOC_RESET_REQ, bar + MHI_SOC_RESET_REQ_OFFSET); > + ioread32(bar + MHI_SOC_RESET_REQ_OFFSET); > + > + /* Be sure device reset has been executed */ > + msleep(2000); > + > + pci_iounmap(pdev, bar); > + pci_write_config_word(pdev, PCI_COMMAND, cmd); > + > + return 0; > +} > + > static const struct pci_dev_reset_methods pci_dev_reset_methods[] = { > { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82599_SFP_VF, > reset_intel_82599_sfp_virtfn }, > @@ -4255,6 +4370,9 @@ static const struct pci_dev_reset_methods pci_dev_reset_methods[] = { > reset_chelsio_generic_dev }, > { PCI_VENDOR_ID_HUAWEI, PCI_DEVICE_ID_HINIC_VF, > reset_hinic_vf_dev }, > + { PCI_VENDOR_ID_QCOM, 0x1103, reset_qualcomm_wifi }, /* WCN6855 WiFi */ > + { PCI_VENDOR_ID_QCOM, 0x1107, reset_qualcomm_wifi }, /* WCN7850 WiFi */ > + { PCI_VENDOR_ID_QCOM, 0x0308, reset_qualcomm_modem }, /* SDX62/SDX65 modems */ > { 0 } > }; >