Re: [PATCH v3 3/7] i2c: qcom-cci: Detect capabilities from CCI_HW_VERSION at runtime

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 10/16/26 10:00 AM, Loic Poulain wrote:
> In theory, every SoC integrating a CCI revision that differs from
> an existing one should introduce a dedicated compatible string.
> In practice, most CCI instances still fall back to the msm8996
> compat (v1.4.0), one of the oldest supported versions. In order
> to take advantage of capabilities introduced in later versions,
> such as larger queues (v1.6.0) or threshold IRQ support (v1.7.0),
> we need to properly distinguish the different variants.
> 
> Replace the static per-compatible cci_data definitions with a
> version-sorted capability table keyed by (hw_major, hw_minor).
> During probe, read CCI hardware revision register and select
> the newest capability entry whose version is less than or equal
> to the detected hardware revision. This allows revisions to
> automatically inherit the closest supported capability set
> without requiring additional compatible strings.
> 
> Several compatibles that currently fall back to the msm8996
> configuration (e.g. sdm845, sm8250 and sm8450) will now resolve
> to the corresponding capability tier, gaining access to their
> larger queue sizes instead of the conservative msm8996 defaults.
> 
> - v1.2.x CCI increase I2C write payload + burst write support
> - v1.6.x CCI has increased queue sizes (64,16) -> (128,32)
> - v1.7.x CCI introduces threshold IRQs (leveraged later)
> - v1.10.x CCI increase queue 0 size (128) -> (1024)
> 
> Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad