From: <Claudiu.Beznea@microchip.com>
To: <Sergiu.Moga@microchip.com>, <lee@kernel.org>,
<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
<Nicolas.Ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
<radu_nicolae.pirea@upb.ro>, <richard.genoud@gmail.com>,
<gregkh@linuxfoundation.org>, <jirislaby@kernel.org>,
<Kavyasree.Kotagiri@microchip.com>
Cc: <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>,
<linux-serial@vger.kernel.org>
Subject: Re: [PATCH v5 6/9] tty: serial: atmel: Separate mode clearing between UART and USART
Date: Fri, 30 Sep 2022 07:22:36 +0000 [thread overview]
Message-ID: <4cff16af-e6f8-f6b6-37e7-e2d743d1022b@microchip.com> (raw)
In-Reply-To: <20220922113347.144383-7-sergiu.moga@microchip.com>
On 22.09.2022 14:33, Sergiu Moga wrote:
> When clearing the mode of the serial IP inside the atmel_set_termios()
> method, make sure that the difference between the bitfields placement
> of the UART IP's and USART IP's is taken into account, as some of
> them overlap with each other. For example, ATMEL_UA_BRSRCCK overlaps
> with ATMEL_US_NBSTOP and ATMEL_US_USCLKS overlaps with ATMEL_UA_FILTER.
>
> Furthermore, add definitions for the Baud Rate Source Clock and the
> Filter bitfields of the Mode Register of UART IP's, since they were
> missing.
>
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> ---
>
>
> v1 -> v5:
> - This patch was not here before but it also includes the previous patch:
> `[PATCH v4 7/9] tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register`
> squashed into it and define BRSRCCK as a bitfield instead of a bitmask,
> since it is only 1 bit.
>
>
>
> drivers/tty/serial/atmel_serial.c | 7 +++++--
> drivers/tty/serial/atmel_serial.h | 2 ++
> 2 files changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
> index ab4a9dfae07d..e3e14cb7668b 100644
> --- a/drivers/tty/serial/atmel_serial.c
> +++ b/drivers/tty/serial/atmel_serial.c
> @@ -2134,8 +2134,11 @@ static void atmel_set_termios(struct uart_port *port,
> mode = old_mode = atmel_uart_readl(port, ATMEL_US_MR);
>
> /* reset the mode, clock divisor, parity, stop bits and data size */
> - mode &= ~(ATMEL_US_USCLKS | ATMEL_US_CHRL | ATMEL_US_NBSTOP |
> - ATMEL_US_PAR | ATMEL_US_USMODE);
> + if (atmel_port->is_usart)
> + mode &= ~(ATMEL_US_NBSTOP | ATMEL_US_PAR | ATMEL_US_CHRL |
> + ATMEL_US_USCLKS | ATMEL_US_USMODE);
> + else
> + mode &= ~(ATMEL_UA_BRSRCCK | ATMEL_US_PAR | ATMEL_UA_FILTER);
>
> baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
>
> diff --git a/drivers/tty/serial/atmel_serial.h b/drivers/tty/serial/atmel_serial.h
> index 0d8a0f9cc5c3..2a525b58e11a 100644
> --- a/drivers/tty/serial/atmel_serial.h
> +++ b/drivers/tty/serial/atmel_serial.h
> @@ -50,6 +50,7 @@
> #define ATMEL_US_USCLKS_MCK (0 << 4)
> #define ATMEL_US_USCLKS_MCK_DIV8 (1 << 4)
> #define ATMEL_US_USCLKS_SCK (3 << 4)
> +#define ATMEL_UA_FILTER BIT(4)
> #define ATMEL_US_CHRL GENMASK(7, 6) /* Character Length */
> #define ATMEL_US_CHRL_5 (0 << 6)
> #define ATMEL_US_CHRL_6 (1 << 6)
> @@ -67,6 +68,7 @@
> #define ATMEL_US_NBSTOP_1 (0 << 12)
> #define ATMEL_US_NBSTOP_1_5 (1 << 12)
> #define ATMEL_US_NBSTOP_2 (2 << 12)
> +#define ATMEL_UA_BRSRCCK BIT(12) /* Clock Selection for UART */
> #define ATMEL_US_CHMODE GENMASK(15, 14) /* Channel Mode */
> #define ATMEL_US_CHMODE_NORMAL (0 << 14)
> #define ATMEL_US_CHMODE_ECHO (1 << 14)
next prev parent reply other threads:[~2022-09-30 7:22 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-22 11:33 [PATCH v5 0/9] Make atmel serial driver aware of GCLK Sergiu Moga
2022-09-22 11:33 ` [PATCH v5 1/9] dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref binding Sergiu Moga
2022-09-28 15:03 ` Lee Jones
2022-09-28 15:07 ` Sergiu.Moga
2022-09-28 15:23 ` Lee Jones
2022-09-28 15:35 ` Sergiu.Moga
2022-10-24 12:25 ` Lee Jones
2022-09-22 11:33 ` [PATCH v5 2/9] dt-bindings: serial: atmel,at91-usart: convert to json-schema Sergiu Moga
2022-09-22 11:33 ` [PATCH v5 3/9] dt-bindings: serial: atmel,at91-usart: Add SAM9260 compatibles to SAM9X60 Sergiu Moga
2022-09-22 11:33 ` [PATCH v5 4/9] dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref binding Sergiu Moga
2022-09-22 11:33 ` [PATCH v5 5/9] dt-bindings: serial: atmel,at91-usart: Add gclk as a possible USART clock Sergiu Moga
2022-09-22 11:33 ` [PATCH v5 6/9] tty: serial: atmel: Separate mode clearing between UART and USART Sergiu Moga
2022-09-30 7:22 ` Claudiu.Beznea [this message]
2022-09-22 11:33 ` [PATCH v5 7/9] tty: serial: atmel: Only divide Clock Divisor if the IP is USART Sergiu Moga
2022-09-30 7:22 ` Claudiu.Beznea
2022-09-22 11:33 ` [PATCH v5 8/9] tty: serial: atmel: Make the driver aware of the existence of GCLK Sergiu Moga
2022-09-30 7:23 ` Claudiu.Beznea
2022-09-22 11:33 ` [PATCH v5 9/9] tty: serial: atmel: Use FIELD_PREP/FIELD_GET Sergiu Moga
2022-09-22 12:12 ` Ilpo Järvinen
2022-09-30 7:23 ` Claudiu.Beznea
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