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From: Hans Zhang <18255117159@163.com>
To: kernel test robot <lkp@intel.com>,
	lpieralisi@kernel.org, bhelgaas@google.com,
	manivannan.sadhasivam@linaro.org, ilpo.jarvinen@linux.intel.com,
	kw@linux.com
Cc: oe-kbuild-all@lists.linux.dev, cassel@kernel.org,
	robh@kernel.org, jingoohan1@gmail.com, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v11 4/6] PCI: dwc: Use common PCI host bridge APIs for finding the capabilities
Date: Sat, 10 May 2025 00:57:40 +0800	[thread overview]
Message-ID: <4d77e199-8df8-4510-ad49-9a452a29c923@163.com> (raw)
In-Reply-To: <202505092036.Sw8SstSY-lkp@intel.com>



On 2025/5/9 20:49, kernel test robot wrote:
> Hi Hans,
> 
> kernel test robot noticed the following build warnings:
> 
> [auto build test WARNING on ca91b9500108d4cf083a635c2e11c884d5dd20ea]
> 
> url:    https://github.com/intel-lab-lkp/linux/commits/Hans-Zhang/PCI-Introduce-generic-bus-config-read-helper-function/20250506-004221
> base:   ca91b9500108d4cf083a635c2e11c884d5dd20ea
> patch link:    https://lore.kernel.org/r/20250505163420.198012-5-18255117159%40163.com
> patch subject: [PATCH v11 4/6] PCI: dwc: Use common PCI host bridge APIs for finding the capabilities
> config: parisc-randconfig-r063-20250509 (https://download.01.org/0day-ci/archive/20250509/202505092036.Sw8SstSY-lkp@intel.com/config)
> compiler: hppa-linux-gcc (GCC) 14.2.0
> reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250509/202505092036.Sw8SstSY-lkp@intel.com/reproduce)
> 
> If you fix the issue in a separate patch/commit (i.e. not just a new version of
> the same patch/commit), kindly add following tags
> | Reported-by: kernel test robot <lkp@intel.com>
> | Closes: https://lore.kernel.org/oe-kbuild-all/202505092036.Sw8SstSY-lkp@intel.com/
> 
> All warnings (new ones prefixed by >>):
> 
>     In function 'dw_pcie_read_cfg',
>         inlined from 'dw_pcie_find_capability' at drivers/pci/controller/dwc/pcie-designware.c:219:9:
>>> drivers/pci/controller/dwc/pcie-designware.c:212:14: warning: write of 32-bit data outside the bound of destination object, data truncated into 8-bit [-Wextra]
>       212 |         *val = dw_pcie_read_dbi(pci, where, size);
>           |         ~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> 
> 
> vim +212 drivers/pci/controller/dwc/pcie-designware.c
> 
>     207	
>     208	static int dw_pcie_read_cfg(void *priv, int where, int size, u32 *val)
>     209	{
>     210		struct dw_pcie *pci = priv;
>     211	
>   > 212		*val = dw_pcie_read_dbi(pci, where, size);
>     213	
>     214		return PCIBIOS_SUCCESSFUL;
>     215	}
>     216	
> 

Dear Maintainers,

I don't know why the warning here is. I think the return value of 
dw_pcie_read_dbi, whether u8/u16, will be automatically and forcibly 
converted to u32.

The following files have similar uses:

drivers/pci/controller/dwc/pci-exynos.c
static int exynos_pcie_rd_own_conf(struct pci_bus *bus, unsigned int devfn,
				   int where, int size, u32 *val)
{
	struct dw_pcie *pci = to_dw_pcie_from_pp(bus->sysdata);

	if (PCI_SLOT(devfn))
		return PCIBIOS_DEVICE_NOT_FOUND;

	*val = dw_pcie_read_dbi(pci, where, size);
	return PCIBIOS_SUCCESSFUL;
}

drivers/pci/controller/dwc/pcie-histb.c
static int histb_pcie_rd_own_conf(struct pci_bus *bus, unsigned int devfn,
				  int where, int size, u32 *val)
{
	struct dw_pcie *pci = to_dw_pcie_from_pp(bus->sysdata);

	if (PCI_SLOT(devfn))
		return PCIBIOS_DEVICE_NOT_FOUND;

	*val = dw_pcie_read_dbi(pci, where, size);
	return PCIBIOS_SUCCESSFUL;
}

drivers/pci/controller/dwc/pcie-kirin.c
static int kirin_pcie_rd_own_conf(struct pci_bus *bus, unsigned int devfn,
				  int where, int size, u32 *val)
{
	struct dw_pcie *pci = to_dw_pcie_from_pp(bus->sysdata);

	if (PCI_SLOT(devfn))
		return PCIBIOS_DEVICE_NOT_FOUND;

	*val = dw_pcie_read_dbi(pci, where, size);
	return PCIBIOS_SUCCESSFUL;
}


drivers/pci/access.c
int pci_generic_config_read(struct pci_bus *bus, unsigned int devfn,
			    int where, int size, u32 *val)
{
	void __iomem *addr;

	addr = bus->ops->map_bus(bus, devfn, where);
	if (!addr)
		return PCIBIOS_DEVICE_NOT_FOUND;

	if (size == 1)
		*val = readb(addr);
	else if (size == 2)
		*val = readw(addr);
	else
		*val = readl(addr);

	return PCIBIOS_SUCCESSFUL;
}
EXPORT_SYMBOL_GPL(pci_generic_config_read);




May I ignore this warning? Could it be that I misunderstood something?


Best regards,
Hans




  reply	other threads:[~2025-05-09 16:58 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-05 16:34 [PATCH v11 0/6] Refactor capability search into common macros Hans Zhang
2025-05-05 16:34 ` [PATCH v11 1/6] PCI: Introduce generic bus config read helper function Hans Zhang
2025-05-05 16:34 ` [PATCH v11 2/6] PCI: Clean up __pci_find_next_cap_ttl() readability Hans Zhang
2025-05-05 16:34 ` [PATCH v11 3/6] PCI: Refactor capability search into common macros Hans Zhang
2025-05-05 16:34 ` [PATCH v11 4/6] PCI: dwc: Use common PCI host bridge APIs for finding the capabilities Hans Zhang
2025-05-09 12:49   ` kernel test robot
2025-05-09 16:57     ` Hans Zhang [this message]
2025-05-05 16:34 ` [PATCH v11 5/6] PCI: cadence: " Hans Zhang
2025-05-13  8:06   ` kernel test robot
2025-05-05 16:34 ` [PATCH v11 6/6] PCI: cadence: Use cdns_pcie_find_*capability to avoid hardcode Hans Zhang

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