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From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Joonhoe Kim <26rote@gmail.com>, vkoul@kernel.org
Cc: neil.armstrong@linaro.org, mani@kernel.org,
	dmitry.baryshkov@oss.qualcomm.com, val@packett.cool,
	wesley.cheng@oss.qualcomm.com, linux-arm-msm@vger.kernel.org,
	linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] phy: qcom: qmp-combo: Leave the USB PCS alone in DP-only mode
Date: Mon, 2 Nov 2026 14:32:41 +0100	[thread overview]
Message-ID: <4d831e77-2123-46eb-90ed-dca3c580d47e@oss.qualcomm.com> (raw)
In-Reply-To: <20261023123512.1912-1-26rote@gmail.com>

On 10/23/26 2:35 PM, Joonhoe Kim wrote:
> In DP-only mode (DisplayPort pin assignments C and E) all four lanes
> belong to the DisplayPort PHY and the USB PCS stays powered down.
> Three paths still touch the USB PCS in this state:

[...]


> @@ -4459,10 +4459,12 @@ static int qmp_combo_usb_init(struct phy *phy)
>  	if (ret)
>  		return ret;
>  
> -	ret = qmp_combo_usb_power_on(phy);
> -	if (ret) {
> -		qmp_combo_com_exit(qmp, false);
> -		return ret;
> +	if (qmp->qmpphy_mode != QMPPHY_MODE_DP_ONLY) {
> +		ret = qmp_combo_usb_power_on(phy);
> +		if (ret) {
> +			qmp_combo_com_exit(qmp, false);
> +			return ret;
> +		}
>  	}

The USB sub-block provides the PIPE clock to the DWC3 controller.
If we somehow enter DP altmode before DWC3 gets to probe, or if for
any reason we need to access that controller (maybe debugfs reads),
I think this will fail.

Konrad

  parent reply	other threads:[~2026-11-02 13:32 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-23 12:35 Joonhoe Kim
2026-10-27 11:20 ` Abel Vesa
2026-11-01 11:06 ` Manivannan Sadhasivam
2026-11-02 13:32 ` Konrad Dybcio [this message]
2026-11-02 13:34 ` Konrad Dybcio

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