Re: [PATCH] ARM: dts: rockchip: Add marvell BT irq config

[Johan Jonker <jbx6244@gmail.com>]

On 6/11/20 4:06 AM, Abhishek Pandit-Subedi wrote:
> Veyron Jaq and Mighty both use the Marvel 8897 WiFi+BT chip. Add wakeup
> and pinctrl block to devicetree so the btmrvl driver can correctly
> configure the wakeup interrupt.
> 
> Signed-off-by: Abhishek Pandit-Subedi <abhishekpandit@chromium.org>
> Reviewed-by: Reviewed-by: Douglas Anderson <dianders@chromium.org>
> ---
> The Veyron Mighty Chromebook (rk3288 based board) is missing the wake
> configuration for Bluetooth. Without this change, the wake irq was not
> configurable and wake on Bluetooth was broken.
> 
> I verified this change with additional changes in the Bluetooth driver
> (the series is at https://patchwork.kernel.org/cover/11599101/). The
> driver changes are not necessary for this dts change and shouldn't block
> it.
> 
> 
>  arch/arm/boot/dts/rk3288-veyron-jaq.dts | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/rk3288-veyron-jaq.dts b/arch/arm/boot/dts/rk3288-veyron-jaq.dts
> index 171ba6185b6d39..976c0c17a71199 100644
> --- a/arch/arm/boot/dts/rk3288-veyron-jaq.dts
> +++ b/arch/arm/boot/dts/rk3288-veyron-jaq.dts
> @@ -51,6 +51,21 @@ &sdmmc {
>  			&sdmmc_bus4>;
>  };
>  

> +&sdio0 {

For nodes:
Sort things without reg alphabetical first,
then sort the rest by reg address.

&sdio0 goes above &sdmmc.

> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	btmrvl: btmrvl@2 {
> +		compatible = "marvell,sd8897-bt";
> +		reg = <2>;
> +		interrupt-parent = <&gpio4>;
> +		interrupts = <RK_PD7 IRQ_TYPE_LEVEL_LOW>;
> +		marvell,wakeup-pin = /bits/ 16 <13>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&bt_host_wake_l>;
> +	};
> +};
> +
>  &vcc_5v {
>  	enable-active-high;
>  	gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
>