From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7354EC32793 for ; Wed, 18 Jan 2023 13:17:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231219AbjARNRT (ORCPT ); Wed, 18 Jan 2023 08:17:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46672 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229770AbjARNQV (ORCPT ); Wed, 18 Jan 2023 08:16:21 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 100E77D650; Wed, 18 Jan 2023 04:40:56 -0800 (PST) Received: from [192.168.1.100] (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id A50DA6602E0B; Wed, 18 Jan 2023 12:40:54 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1674045655; bh=+loW/XVzSr0xbOK3szJGLSNgt77x/7ltGgyJxfGL0Dg=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=Lwg4co7MNW1JwE74DkaEE6ExU6hkaR3ExFGYuucN3sCUcKLmIp/UM73u3ickeVvn1 5EXe6WN6+PtIsV+oWvqpMc905xTdpKfu3DLpuNhuXAXxwjrjWExk2OinrAUn6wYS4T fahWz4jcYoQUd8xgkSp2btTY/27JvHxMdd+sG3N6P/qbdtcqfChnCYSJaKLywzPlpl gVJ4aYoskD5qSK63XTQjd/+5N/U3tbVTc1YT7bL/mpxL7i1bVkso+nhG2PBqAfCy7F 7SXMMlJRKd9bucWAWMvmfTiHdnlHm7TUmBjo3XRvqLGjAK2xbkCABWe5+3brWtOJBF R4nIxrtcU81DA== Message-ID: <4da35cf7-5c8b-1086-36aa-760d20774c7c@collabora.com> Date: Wed, 18 Jan 2023 13:40:52 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 Subject: Re: [PATCH v2 1/9] arm64: dts: mediatek: mt8186: Add MTU3 nodes Content-Language: en-US To: Allen-KH Cheng , Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Stephen Boyd , dri-devel@lists.freedesktop.org Cc: Project_Global_Chrome_Upstream_Group@mediatek.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, hsinyi@chromium.org References: <20230118091829.755-1-allen-kh.cheng@mediatek.com> <20230118091829.755-2-allen-kh.cheng@mediatek.com> From: AngeloGioacchino Del Regno In-Reply-To: <20230118091829.755-2-allen-kh.cheng@mediatek.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Il 18/01/23 10:18, Allen-KH Cheng ha scritto: > Add MTU3 nodes for MT8186 SoC. > > Signed-off-by: Allen-KH Cheng > Tested-by: Chen-Yu Tsai > --- > arch/arm64/boot/dts/mediatek/mt8186.dtsi | 75 ++++++++++++++++++++++++ > 1 file changed, 75 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > index c0a3afd55eaf..3d88480913eb 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > @@ -908,6 +908,43 @@ > status = "disabled"; > }; > > + ssusb0: usb@11201000 { > + compatible = "mediatek,mt8186-mtu3", > + "mediatek,mtu3"; 78 columns; compatibles fit in one line. > + reg = <0 0x11201000 0 0x2dff>, > + <0 0x11203e00 0 0x0100>; 80 cols; regs fit in one line. > + reg-names = "mac", "ippc"; > + clocks = <&topckgen CLK_TOP_USB_TOP>, > + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>, > + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_HCLK>, > + <&infracfg_ao CLK_INFRA_AO_ICUSB>; > + clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck"; > + interrupts = ; > + phys = <&u2port0 PHY_TYPE_USB2>; > + power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB>; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + status = "disabled"; > + > + usb_host0: usb@11200000 { > + compatible = "mediatek,mt8186-xhci", > + "mediatek,mtk-xhci"; 90 cols; fits in one line. ...same comments for ssusb1 :-) > + reg = <0 0x11200000 0 0x1000>; > + reg-names = "mac"; > + clocks = <&topckgen CLK_TOP_USB_TOP>, > + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>, > + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_HCLK>, > + <&infracfg_ao CLK_INFRA_AO_ICUSB>, > + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_XHCI>; > + clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck"; > + interrupts = ; > + mediatek,syscon-wakeup = <&pericfg 0x420 2>; > + wakeup-source; > + status = "disabled"; > + }; > + }; > + > mmc0: mmc@11230000 { > compatible = "mediatek,mt8186-mmc", > "mediatek,mt8183-mmc"; > @@ -939,6 +976,44 @@ > status = "disabled"; > }; > > + ssusb1: usb@11281000 { > + compatible = "mediatek,mt8186-mtu3", > + "mediatek,mtu3"; > + reg = <0 0x11281000 0 0x2dff>, > + <0 0x11283e00 0 0x0100>; > + reg-names = "mac", "ippc"; > + clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>, > + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>, > + <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_HCLK>, > + <&clk26m>; > + clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck"; > + interrupts = ; > + phys = <&u2port1 PHY_TYPE_USB2>, > + <&u3port1 PHY_TYPE_USB3>; phys fit in one line. Regards, Angelo