mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Junyi Zhao <junyi.zhao@amlogic.com>
To: Frank Li <Frank.li@oss.nxp.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Frank Li <Frank.Li@nxp.com>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Kevin Hilman <khilman@baylibre.com>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Kees Cook <kees@kernel.org>,
	"Gustavo A. R. Silva" <gustavoars@kernel.org>,
	linux-i3c@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-amlogic@lists.infradead.org, imx@lists.linux.dev,
	linux-hardening@vger.kernel.org, xianwei.zhao@amlogic.com,
	Kelvin.Zhang@amlogic.com
Subject: [PATCH 1/3] i3c: master: Rework SVC I3C to support vendor glue layers
Date: Thu, 22 Oct 2026 19:44:03 +0800	[thread overview]
Message-ID: <4da3cd55-0115-4817-a19d-18a69b7a7cc6@amlogic.com> (raw)
In-Reply-To: <atjOD0PwVGDeh2uL@lizhi-Precision-Tower-5810>

Hi frank,
	thks for your details.

On 21/10/2026 22:37, Frank Li wrote:
> [ EXTERNAL EMAIL ]
> 
> On Wed, Oct 21, 2026 at 10:56:19AM +0800, Junyi Zhao wrote:
>> Hi Frank,
>>
>> Thanks for looking at this.
>>
>> Amlogic A9 used the same SVC I3C IP engine, but the integration of it
>> differs in the resources *around* the controller, which cannot be
>> expressed as another quirks entry:
>>
>> - On the "ao" instance the bus clock is generated by an internal
>>    divider (I3C_AO_FCLK_DIV_CTRL @0x304) programmed directly by the
>>    driver; there is no CCF clock to clk_set_rate() on, while the
>>    common probe assumes the fclk is a plain enable-able clock.
> 
> If it is in I3C memory region, you can do that by use callback. otherwise
> should go through clock framework.

The AO divider register is inside the I3C mem region, so I'll
handle it with a drvdata callback. I'll also evaluate Neil's suggestion
of modeling it as a CCF clock for v2; if that works out cleanly, the
callback goes away entirely.

> 
>>
>> - Amlogic added register blocks outside the Silvaco map: a
>>    DMA bridge and a bus monitor (0x200..0x22c).
> 
> Does DMA bridge only for I3C? It should be go through standard DMA engine.
> 
> what bus monitor use for.
> 
>>    Enabling the DMA bridge later will need hooks in the common
>>    transfer path.
> 
> We also need support DMA in future.

Yes, the bridge is dedicated to the I3C controller, and the data path
will go through the standard dmaengine framework: our SoC-internal DMA
controller has its own dmaengine driver, and the I3C driver only uses
the standard slave API .

"DMA bridge" is a small set of registers inside the I3C mem region,
  which adapt the I3C FIFOs to the SoC-internal DMA controller. 
Programming them is part of the I3C controller initialization, not part 
of the DMA engine configuration.

The bus monitor is a debug block, not necessary, i will drop it.

> 
>>
>> Adding A9 support to svc-i3c-master.c directly, would make these
>> becomes if-branches in probe()/PM/transfer paths of the shared
>> driver, and the next vendor repeats that.
> 
> You can use callback function in drvdata.
> 
>> With the glue layer,
>> i3c-main.c keeps today's logic unchanged: i3c-silvaco.c is the
>> current probe code moved as-is (rename with 79% similarity), so
>> blame/history is preserved.
>>
>> If the file move is the main concern, I can keep
>> svc-i3c-master.c where it is and only export the alloc/probe/remove/PM/
>> interface for glue drivers -- the essential part for me is keeping
>> the resource handling out of the common code paths.
> 
> Now, there are not much user yet. Rename or re-org only when it becomes
> complex enough.
> 

Okay, isee your point.
I'll keep svc-i3c-master.c as a single file and add optional callbacks 
to struct svc_i3c_drvdata instead of the split and rename.


> Frank
> 
>>
>> Also, per Neil's suggestion I'll try modeling the AO divider as a
>> CCF clock in v2, which should drop one hook.
>>
>> Thanks,
>> Junyi
>>
>>
>> On 2026/10/20 4:32, Frank Li wrote:
>>> [ EXTERNAL EMAIL ]
>>>
>>> On Mon, Oct 19, 2026 at 01:34:26PM +0800, Junyi Zhao via B4 Relay wrote:
>>>> [You don't often get email from devnull+junyi.zhao.amlogic.com@kernel.org. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>>>>
>>>> From: Junyi Zhao <junyi.zhao@amlogic.com>
>>>>
>>>> The SVC I3C controller IP can be integrated into SoCs from different
>>>> vendors. Peripheral resources associated with the controller, such as
>>>> clocks, may vary between vendor implementations.
>>>>
>>>> Rework the driver to separate common functionality from
>>>> vendor-specific extensions. The common logic is shared across all
>>>> implementations, while platform-dependent operations are provided
>>>> through vendor-specific hooks.
>>>>
>>>> Also add a corresponding MAINTAINERS entry for the SILVACO I3C
>>>> controller.
>>>>
>>>> Signed-off-by: Junyi Zhao <junyi.zhao@amlogic.com>
>>>> ---
>>>
>>> No big difference. Needn't rework svc-i3c-master.c, you can add amlogic at
>>> svc-i3c-master.c directly.
>>>
>>> Frank


  reply	other threads:[~2026-10-22 11:44 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-19  5:34 [PATCH 0/3] Add vendor glue layer support and Amlogic A9 implementation Junyi Zhao via B4 Relay
2026-10-19  5:34 ` [PATCH 1/3] i3c: master: Rework SVC I3C to support vendor glue layers Junyi Zhao via B4 Relay
2026-10-19 20:32   ` Frank Li
2026-10-21  2:56     ` Junyi Zhao
2026-10-21 14:37       ` Frank Li
2026-10-22 11:44         ` Junyi Zhao [this message]
2026-10-19  5:34 ` [PATCH 2/3] dt-bindings: i3c: Add Amlogic A9 I3C controller Junyi Zhao via B4 Relay
2026-10-19  6:00   ` Krzysztof Kozlowski
2026-10-21  5:38     ` Junyi Zhao
2026-10-21  6:19       ` Krzysztof Kozlowski
2026-10-21  6:36         ` Junyi Zhao
2026-10-19  6:01   ` Krzysztof Kozlowski
2026-10-21  5:56     ` Junyi Zhao
2026-10-19  5:34 ` [PATCH 3/3] i3c: master: svc: Add Amlogic A9 glue layer Junyi Zhao via B4 Relay
2026-10-19  7:40   ` Neil Armstrong
2026-10-21  5:17     ` Junyi Zhao

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=4da3cd55-0115-4817-a19d-18a69b7a7cc6@amlogic.com \
    --to=junyi.zhao@amlogic.com \
    --cc=Frank.Li@nxp.com \
    --cc=Frank.li@oss.nxp.com \
    --cc=Kelvin.Zhang@amlogic.com \
    --cc=alexandre.belloni@bootlin.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=gustavoars@kernel.org \
    --cc=imx@lists.linux.dev \
    --cc=jbrunet@baylibre.com \
    --cc=kees@kernel.org \
    --cc=khilman@baylibre.com \
    --cc=krzk+dt@kernel.org \
    --cc=linux-amlogic@lists.infradead.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-hardening@vger.kernel.org \
    --cc=linux-i3c@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=martin.blumenstingl@googlemail.com \
    --cc=miquel.raynal@bootlin.com \
    --cc=neil.armstrong@linaro.org \
    --cc=robh@kernel.org \
    --cc=xianwei.zhao@amlogic.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®