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[88.112.131.206]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-537a85e0b8dsm418150e87.61.2024.09.24.22.39.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 24 Sep 2024 22:39:12 -0700 (PDT) Message-ID: <4de5ead0-0d66-4e57-85bb-cd8a6ca29fcf@linaro.org> Date: Wed, 25 Sep 2024 08:39:04 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/1] i2c: qcom-geni: add 32MHz I2C SE clock support for IPQ5424 Content-Language: en-US To: Manikanta Mylavarapu , andi.shyti@kernel.org, linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: quic_srichara@quicinc.com, quic_varada@quicinc.com References: <20240924065020.2009975-1-quic_mmanikan@quicinc.com> From: Vladimir Zapolskiy In-Reply-To: <20240924065020.2009975-1-quic_mmanikan@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hello Manikanta, On 9/24/24 09:50, Manikanta Mylavarapu wrote: > The IPQ5424 I2C SE clock operates at a frequency of 32MHz. Since the > existing map table is based on 19.2MHz, this patch incorporate the > clock map table to derive the SCL clock from the 32MHz SE clock. > > Signed-off-by: Manikanta Mylavarapu > --- > drivers/i2c/busses/i2c-qcom-geni.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c > index 212336f724a6..bbd9ecf09f4b 100644 > --- a/drivers/i2c/busses/i2c-qcom-geni.c > +++ b/drivers/i2c/busses/i2c-qcom-geni.c > @@ -71,6 +71,7 @@ enum geni_i2c_err_code { > > #define I2C_AUTO_SUSPEND_DELAY 250 > #define KHZ(freq) (1000 * freq) > +#define MHZ(freq) (1000000 * freq) pleae drop this new macro, please use freq * HZ_PER_MHZ instead of MHZ(freq). KHZ(freq) macro should be also replaced by HZ_PER_KHZ, but it's a separate change. -- Best wishes, Vladimir