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Sun, 01 Nov 2026 07:28:25 -0800 (PST) Received: from pve-server.rlab ([49.205.216.49]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1ac18458e07sm24862665c88.8.2026.11.01.07.28.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Nov 2026 07:28:25 -0800 (PST) From: "Ritesh Harjani (IBM)" To: linuxppc-dev@lists.ozlabs.org Cc: Madhavan Srinivasan , Venkat Rao Bagalkote , linux-kernel@vger.kernel.org, chleroy@kernel.org, Michael Ellerman , Nicholas Piggin , kvm@vger.kernel.org, Anushree Mathur , Harsh Prateek Bora , "Ritesh Harjani (IBM)" Subject: [PATCHv3 1/7] KVM: PPC: Book3S HV: Read EX_DSISR as a 32-bit field on guest exit Date: Sun, 1 Nov 2026 20:58:06 +0530 Message-Id: <4e883269c887f68f4d9d54f2675799df147a5db5.1793546707.git.ritesh.list@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit kvmhv_vcpu_entry_p9() recovers the guest fault state from the paca exception save area with vcpu->arch.fault_dsisr = exsave[EX_DSISR/sizeof(u64)]; but EX_DSISR is not a doubleword. It is a 32-bit field at offset 48 that shares a doubleword with EX_CCR at offset 52 and the exception entry in exceptions-64s.S stores it accordingly. For e.g. stw r10,IAREA+EX_DSISR(r13) This issue was caught when running kvm selftests on big-endian, where this read would land in the high half and the truncation yields EX_CCR instead - KVM acts on the guest's condition register as if it were HDSISR. The result is that every HDSI on a big-endian host is evaluated against a bogus fault status i.e. it fails with below error: KVM: Got radix HV page fault with DSISR=84004840 Let's fix this by reading this field at it's natural width. Fixes: 89d35b239101 ("KVM: PPC: Book3S HV P9: Implement the rest of the P9 path in C") Signed-off-by: Ritesh Harjani (IBM) --- arch/powerpc/kvm/book3s_hv_p9_entry.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/kvm/book3s_hv_p9_entry.c b/arch/powerpc/kvm/book3s_hv_p9_entry.c index 34bc0a8a1288..16aa8582b888 100644 --- a/arch/powerpc/kvm/book3s_hv_p9_entry.c +++ b/arch/powerpc/kvm/book3s_hv_p9_entry.c @@ -529,6 +529,15 @@ unsigned long kvmppc_msr_hard_disable_set_facilities(struct kvm_vcpu *vcpu, unsi } EXPORT_SYMBOL_GPL(kvmppc_msr_hard_disable_set_facilities); +/* + * EX_DSISR is a 32-bit field that shares a doubleword with EX_CCR. + * Small helper for reading it back at its natural width. + */ +static u32 exsave_dsisr(u64 *exsave) +{ + return *(u32 *)((void *)exsave + EX_DSISR); +} + int kvmhv_vcpu_entry_p9(struct kvm_vcpu *vcpu, u64 time_limit, unsigned long lpcr, u64 *tb) { struct p9_host_os_sprs host_os_sprs; @@ -770,7 +779,7 @@ int kvmhv_vcpu_entry_p9(struct kvm_vcpu *vcpu, u64 time_limit, unsigned long lpc if (unlikely(trap == BOOK3S_INTERRUPT_MACHINE_CHECK)) { vcpu->arch.fault_dar = exsave[EX_DAR/sizeof(u64)]; - vcpu->arch.fault_dsisr = exsave[EX_DSISR/sizeof(u64)]; + vcpu->arch.fault_dsisr = exsave_dsisr(exsave); kvmppc_realmode_machine_check(vcpu); } else if (unlikely(trap == BOOK3S_INTERRUPT_HMI)) { @@ -781,7 +790,7 @@ int kvmhv_vcpu_entry_p9(struct kvm_vcpu *vcpu, u64 time_limit, unsigned long lpc } else if (trap == BOOK3S_INTERRUPT_H_DATA_STORAGE) { vcpu->arch.fault_dar = exsave[EX_DAR/sizeof(u64)]; - vcpu->arch.fault_dsisr = exsave[EX_DSISR/sizeof(u64)]; + vcpu->arch.fault_dsisr = exsave_dsisr(exsave); vcpu->arch.fault_gpa = mfspr(SPRN_ASDR); } else if (trap == BOOK3S_INTERRUPT_H_INST_STORAGE) { -- 2.39.5