From: Tudor Ambarus <tudor.ambarus@linaro.org>
To: William McVicker <willmcvicker@google.com>
Cc: Peter Griffin <peter.griffin@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Alim Akhtar <alim.akhtar@samsung.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, andre.draszik@linaro.org,
kernel-team@android.com, daniel.lezcano@linaro.org,
vincent.guittot@linaro.org, ulf.hansson@linaro.org,
arnd@arndb.de
Subject: Re: [PATCH v2 3/4] arm64: dts: exynos: gs101: add ACPM protocol node
Date: Tue, 17 Dec 2024 08:38:29 +0000 [thread overview]
Message-ID: <4e8936e0-ac69-49e8-919f-b2776dd88779@linaro.org> (raw)
In-Reply-To: <45a54924-226e-4a94-b1ae-b0f1f703f854@linaro.org>
On 12/17/24 7:20 AM, Tudor Ambarus wrote:
>
>
> On 12/16/24 6:54 PM, William McVicker wrote:
>> Hi Tudor,
>
> Hi, William!
>
>>
>> On 12/12/2024, Tudor Ambarus wrote:
>>> Add the ACPM protocol node. ACPM protocol provides interface for all
>>> the client drivers making use of the features offered by the
>>> Active Power Management (APM) module.
>>>
>>> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
>>> ---
>>> arch/arm64/boot/dts/exynos/google/gs101.dtsi | 22 ++++++++++++++++++++++
>>> 1 file changed, 22 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
>>> index 04561e15b96c..8c3f07371912 100644
>>> --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
>>> +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
>>> @@ -277,6 +277,28 @@ apm_sram: sram@2039000 {
>>> ranges = <0x0 0x0 0x2039000 0x40000>;
>>> };
>>>
>>> + firmware {
>>> + acpm_ipc: power-management {
>>> + compatible = "google,gs101-acpm-ipc";
>>> + mboxes = <&ap2apm_mailbox 0 0
>>> + &ap2apm_mailbox 0 1
>>> + &ap2apm_mailbox 0 2
>>> + &ap2apm_mailbox 0 3
>>> + &ap2apm_mailbox 0 4
>>> + &ap2apm_mailbox 0 5
>>> + &ap2apm_mailbox 0 6
>>> + &ap2apm_mailbox 0 7
>>> + &ap2apm_mailbox 0 8
>>> + &ap2apm_mailbox 0 9
>>> + &ap2apm_mailbox 0 10
>>> + &ap2apm_mailbox 0 11
>>> + &ap2apm_mailbox 0 12
>>> + &ap2apm_mailbox 0 13
>>> + &ap2apm_mailbox 0 14>;
>>> + shmem = <&apm_sram>;
>>> + };
>>> + };
>>
>> You mentioned in the previous patch that "GS101 has 14 mailbox controllers",
>
> Right, I got the number from the GS101 memory map.
>
>> but here you have 15 mailboxes. I looked at the downstream driver and see the
>
> Here we have a single mailbox controller, ap2apm_mailbox, with 15 channels.
>
>> number of mailboxes is defined by the ACPM framework (firmware) which is read
>
> s/mailboxes/mailbox channels that ACPM uses/
>
>> from SRAM initdata. Dumping that, I see there are 15 ACPM channels. Have you
>
> Correct.
>
>> looked into into extracting the data from the initdata SRAM address?
>>
>
> Yes, that's the reason why I defined the 15 channels from above for the
> ap2apm_mailbox controller.
>
Haven't explicitly mentioned in the commit message: the ACPM protocol is
a mailbox client for the ap2apm_mailbox controller. The ACPM protocol
uses 15 mailbox channels of a total of 16 channels that ap2apm_mailbox
controller provides.
Let me know if you think I shall update the commit message.
Thanks,
ta
next prev parent reply other threads:[~2024-12-17 8:38 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-12 16:00 [PATCH v2 0/4] arm64: exynos: gs101: add ACPM related nodes Tudor Ambarus
2024-12-12 16:00 ` [PATCH v2 1/4] arm64: dts: exynos: gs101: add SRAM node Tudor Ambarus
2024-12-12 16:00 ` [PATCH v2 2/4] arm64: dts: exynos: gs101: add AP to APM mailbox node Tudor Ambarus
2024-12-12 16:00 ` [PATCH v2 3/4] arm64: dts: exynos: gs101: add ACPM protocol node Tudor Ambarus
2024-12-16 18:54 ` William McVicker
2024-12-17 7:20 ` Tudor Ambarus
2024-12-17 8:38 ` Tudor Ambarus [this message]
2024-12-12 16:00 ` [PATCH v2 4/4] arm64: defconfig: enable ACPM protocol and Exynos mailbox Tudor Ambarus
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