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[83.9.31.248]) by smtp.gmail.com with ESMTPSA id l17-20020a05651c10d100b002ab0c9fab23sm1089550ljn.79.2023.05.08.00.37.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 08 May 2023 00:37:56 -0700 (PDT) Message-ID: <4e9275be-c584-8656-2edb-447ab5546e5c@linaro.org> Date: Mon, 8 May 2023 09:37:55 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.1 Subject: Re: [PATCH 3/6] soc: qcom: ocmem: make iface clock optional Content-Language: en-US To: Luca Weiss , ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Andy Gross , Bjorn Andersson , Rob Clark , Brian Masney , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20230506-msm8226-ocmem-v1-0-3e24e2724f01@z3ntu.xyz> <20230506-msm8226-ocmem-v1-3-3e24e2724f01@z3ntu.xyz> From: Konrad Dybcio In-Reply-To: <20230506-msm8226-ocmem-v1-3-3e24e2724f01@z3ntu.xyz> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 7.05.2023 11:12, Luca Weiss wrote: > Some platforms such as msm8226 do not have an iface clk. Since clk_bulk > APIs don't offer to a way to treat some clocks as optional simply add > core_clk and iface_clk members to our drvdata. > > Signed-off-by: Luca Weiss > --- I think I don't see anything wrong in here! Reviewed-by: Konrad Dybcio Konrad > drivers/soc/qcom/ocmem.c | 42 ++++++++++++++++++++++++------------------ > 1 file changed, 24 insertions(+), 18 deletions(-) > > diff --git a/drivers/soc/qcom/ocmem.c b/drivers/soc/qcom/ocmem.c > index a11a955a1327..6235065d3bc9 100644 > --- a/drivers/soc/qcom/ocmem.c > +++ b/drivers/soc/qcom/ocmem.c > @@ -54,6 +54,8 @@ struct ocmem { > const struct ocmem_config *config; > struct resource *memory; > void __iomem *mmio; > + struct clk *core_clk; > + struct clk *iface_clk; > unsigned int num_ports; > unsigned int num_macros; > bool interleaved; > @@ -91,16 +93,6 @@ struct ocmem { > #define OCMEM_PSGSC_CTL_MACRO2_MODE(val) FIELD_PREP(0x00000700, (val)) > #define OCMEM_PSGSC_CTL_MACRO3_MODE(val) FIELD_PREP(0x00007000, (val)) > > -#define OCMEM_CLK_CORE_IDX 0 > -static struct clk_bulk_data ocmem_clks[] = { > - { > - .id = "core", > - }, > - { > - .id = "iface", > - }, > -}; > - > static inline void ocmem_write(struct ocmem *ocmem, u32 reg, u32 data) > { > writel(data, ocmem->mmio + reg); > @@ -316,9 +308,15 @@ static int ocmem_dev_probe(struct platform_device *pdev) > ocmem->dev = dev; > ocmem->config = device_get_match_data(dev); > > - ret = devm_clk_bulk_get(dev, ARRAY_SIZE(ocmem_clks), ocmem_clks); > - if (ret) > - return dev_err_probe(dev, ret, "Unable to get clocks\n"); > + ocmem->core_clk = devm_clk_get(dev, "core"); > + if (IS_ERR(ocmem->core_clk)) > + return dev_err_probe(dev, PTR_ERR(ocmem->core_clk), > + "Unable to get core clock\n"); > + > + ocmem->iface_clk = devm_clk_get_optional(dev, "iface"); > + if (IS_ERR(ocmem->iface_clk)) > + return dev_err_probe(dev, PTR_ERR(ocmem->iface_clk), > + "Unable to get iface clock\n"); > > ocmem->mmio = devm_platform_ioremap_resource_byname(pdev, "ctrl"); > if (IS_ERR(ocmem->mmio)) > @@ -333,11 +331,15 @@ static int ocmem_dev_probe(struct platform_device *pdev) > } > > /* The core clock is synchronous with graphics */ > - WARN_ON(clk_set_rate(ocmem_clks[OCMEM_CLK_CORE_IDX].clk, 1000) < 0); > + WARN_ON(clk_set_rate(ocmem->core_clk, 1000) < 0); > + > + ret = clk_prepare_enable(ocmem->core_clk); > + if (ret) > + return dev_err_probe(ocmem->dev, ret, "Failed to enable core clock\n"); > > - ret = clk_bulk_prepare_enable(ARRAY_SIZE(ocmem_clks), ocmem_clks); > + ret = clk_prepare_enable(ocmem->iface_clk); > if (ret) > - return dev_err_probe(ocmem->dev, ret, "Failed to enable clocks\n"); > + return dev_err_probe(ocmem->dev, ret, "Failed to enable iface clock\n"); > > if (qcom_scm_restore_sec_cfg_available()) { > dev_dbg(dev, "configuring scm\n"); > @@ -396,13 +398,17 @@ static int ocmem_dev_probe(struct platform_device *pdev) > return 0; > > err_clk_disable: > - clk_bulk_disable_unprepare(ARRAY_SIZE(ocmem_clks), ocmem_clks); > + clk_disable_unprepare(ocmem->core_clk); > + clk_disable_unprepare(ocmem->iface_clk); > return ret; > } > > static int ocmem_dev_remove(struct platform_device *pdev) > { > - clk_bulk_disable_unprepare(ARRAY_SIZE(ocmem_clks), ocmem_clks); > + struct ocmem *ocmem = platform_get_drvdata(pdev); > + > + clk_disable_unprepare(ocmem->core_clk); > + clk_disable_unprepare(ocmem->iface_clk); > > return 0; > } >