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dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=amd.com; Received: from SA1PR12MB6798.namprd12.prod.outlook.com (2603:10b6:806:25a::22) by SJ2PR12MB8830.namprd12.prod.outlook.com (2603:10b6:a03:4d0::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.546.22; Fri, 30 Oct 2026 15:21:55 +0000 Received: from SA1PR12MB6798.namprd12.prod.outlook.com ([fe80::e317:e4a3:6ae9:8c54]) by SA1PR12MB6798.namprd12.prod.outlook.com ([fe80::e317:e4a3:6ae9:8c54%5]) with mapi id 15.21.0569.008; Fri, 30 Oct 2026 15:21:55 +0000 Message-ID: <4f0aae0e-8a0c-433a-b433-f1346b88d492@amd.com> Date: Fri, 30 Oct 2026 20:51:44 +0530 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/5] dmaengine: xilinx_dma: Reject transfers that map no data To: kernel@nullptr.com, Vinod Koul , dmaengine@vger.kernel.org Cc: Frank Li , Michal Simek , Radhey Shyam Pandey , Alex Bereza , Folker Schwesinger , Tomi Valkeinen , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20261022-xilinx-dma-work-v1-0-20faea2e7a80@nullptr.com> <20261022-xilinx-dma-work-v1-1-20faea2e7a80@nullptr.com> Content-Language: en-US From: "Gupta, Suraj" In-Reply-To: <20261022-xilinx-dma-work-v1-1-20faea2e7a80@nullptr.com> Content-Type: text/plain; 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Jensen via B4 Relay wrote: > From: "Jeff C. Jensen" > > If every entry of a scatterlist or a DMA vector array has zero length, > the preparation loops in xilinx_dma_prep_slave_sg(), > xilinx_dma_prep_peripheral_dma_vec() and xilinx_mcdma_prep_slave_sg() > allocate no segments. Each function then takes list_first_entry() of the > empty segment list anyway, so desc->async_tx.phys, which is later > programmed as the current descriptor, is derived from the list head > rather than from a segment. For DMA_MEM_TO_DEV, the SOP and EOP bits are > also set through pointers that do not point at a segment. > > Fail the preparation when no segment was allocated. > > Fixes: c0bba3a99f07 ("dmaengine: vdma: Add Support for Xilinx AXI Direct Memory Access Engine") > Fixes: 6ccd692bfb7f ("dmaengine: xilinx_dma: Add Xilinx AXI MCDMA Engine driver support") > Fixes: 38433a6fdfb7 ("dmaengine: xilinx_dma: Support descriptor setup from dma_vecs") > Assisted-by: Claude:claude-fable-5-1 > Signed-off-by: Jeff C. Jensen > --- Reviewed-by: Suraj Gupta Thanks! Suraj > drivers/dma/xilinx/xilinx_dma.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c > index cffe7c6fa640..5ccc9f9d58a3 100644 > --- a/drivers/dma/xilinx/xilinx_dma.c > +++ b/drivers/dma/xilinx/xilinx_dma.c > @@ -2305,6 +2305,9 @@ static struct dma_async_tx_descriptor *xilinx_dma_prep_peripheral_dma_vec( > } > } > > + if (list_empty(&desc->segments)) > + goto error; > + > head = list_first_entry(&desc->segments, struct xilinx_axidma_tx_segment, node); > desc->async_tx.phys = head->phys; > > @@ -2406,6 +2409,9 @@ static struct dma_async_tx_descriptor *xilinx_dma_prep_slave_sg( > } > } > > + if (list_empty(&desc->segments)) > + goto error; > + > segment = list_first_entry(&desc->segments, > struct xilinx_axidma_tx_segment, node); > desc->async_tx.phys = segment->phys; > @@ -2613,6 +2619,9 @@ xilinx_mcdma_prep_slave_sg(struct dma_chan *dchan, struct scatterlist *sgl, > } > } > > + if (list_empty(&desc->segments)) > + goto error; > + > segment = list_first_entry(&desc->segments, > struct xilinx_aximcdma_tx_segment, node); > desc->async_tx.phys = segment->phys; >