From: JiaJie Ho <jiajie.ho@starfivetech.com>
To: Herbert Xu <herbert@gondor.apana.org.au>
Cc: "David S . Miller" <davem@davemloft.net>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Emil Renner Berthing <kernel@esmil.dk>,
Conor Dooley <conor.dooley@microchip.com>,
"linux-crypto@vger.kernel.org" <linux-crypto@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>
Subject: RE: [PATCH v2 4/4] crypto: starfive - Add hash and HMAC support
Date: Fri, 10 Feb 2023 01:39:26 +0000 [thread overview]
Message-ID: <4f40b91f0756417ba5edbc742a3cd349@EXMBX168.cuchost.com> (raw)
In-Reply-To: <Y+TBDqkjsuMiA/P7@gondor.apana.org.au>
> -----Original Message-----
> From: Herbert Xu <herbert@gondor.apana.org.au>
> Sent: 9 February, 2023 5:47 PM
> To: JiaJie Ho <jiajie.ho@starfivetech.com>
> Cc: David S . Miller <davem@davemloft.net>; Rob Herring
> <robh+dt@kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Emil Renner Berthing
> <kernel@esmil.dk>; Conor Dooley <conor.dooley@microchip.com>; linux-
> crypto@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; linux-riscv@lists.infradead.org
> Subject: Re: [PATCH v2 4/4] crypto: starfive - Add hash and HMAC support
>
> On Mon, Jan 30, 2023 at 11:42:42PM +0800, Jia Jie Ho wrote:
> >
> > +static inline int starfive_hash_wait_hmac_done(struct
> > +starfive_cryp_ctx *ctx) {
> > + struct starfive_cryp_dev *cryp = ctx->cryp;
> > + u32 status;
> > +
> > + return readl_relaxed_poll_timeout(cryp->base +
> STARFIVE_HASH_SHACSR, status,
> > + (status &
> STARFIVE_HASH_HMAC_DONE), 10, 100000); }
> > +
> > +static inline int starfive_hash_wait_busy(struct starfive_cryp_ctx
> > +*ctx) {
> > + struct starfive_cryp_dev *cryp = ctx->cryp;
> > + u32 status;
> > +
> > + return readl_relaxed_poll_timeout(cryp->base +
> STARFIVE_HASH_SHACSR, status,
> > + !(status & STARFIVE_HASH_BUSY),
> 10, 100000); }
> > +
> > +static inline int starfive_hash_wait_key_done(struct
> > +starfive_cryp_ctx *ctx) {
> > + struct starfive_cryp_dev *cryp = ctx->cryp;
> > + u32 status;
> > +
> > + return readl_relaxed_poll_timeout(cryp->base +
> STARFIVE_HASH_SHACSR, status,
> > + (status &
> STARFIVE_HASH_KEY_DONE), 10, 100000); }
>
> Is there no IRQ mechanism for this?
Only hmac done has IRQ, I'll add that in the next version.
Thanks
Jia Jie
next prev parent reply other threads:[~2023-02-10 1:39 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-30 15:42 [PATCH v2 0/4] crypto: starfive - Add drivers for crypto engine Jia Jie Ho
2023-01-30 15:42 ` [PATCH v2 1/4] dt-bindings: crypto: Add StarFive crypto module Jia Jie Ho
2023-02-01 1:44 ` Rob Herring
2023-01-30 15:42 ` [PATCH v2 2/4] crypto: starfive - Add crypto engine support Jia Jie Ho
2023-01-30 15:42 ` [PATCH v2 3/4] riscv: dts: starfive: Add crypto and DMA node for VisionFive 2 Jia Jie Ho
2023-03-07 21:48 ` Palmer Dabbelt
2023-01-30 15:42 ` [PATCH v2 4/4] crypto: starfive - Add hash and HMAC support Jia Jie Ho
2023-02-09 9:14 ` Herbert Xu
2023-02-09 9:33 ` JiaJie Ho
2023-02-09 9:43 ` Herbert Xu
2023-02-10 1:05 ` JiaJie Ho
2023-02-14 6:12 ` Christoph Hellwig
2023-02-14 7:11 ` JiaJie Ho
2023-02-10 2:40 ` Herbert Xu
2023-02-14 6:12 ` Christoph Hellwig
2023-02-09 9:46 ` Herbert Xu
2023-02-10 1:39 ` JiaJie Ho [this message]
2023-02-08 15:10 ` [PATCH v2 0/4] crypto: starfive - Add drivers for crypto engine JiaJie Ho
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