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Tue, 28 Jul 2026 05:12:12 -0700 (PDT) X-Received: by 2002:a05:622a:aa04:20b0:51a:8c9b:6492 with SMTP id d75a77b69052e-529d7232ed1mr10656001cf.9.1785240731788; Tue, 28 Jul 2026 05:12:11 -0700 (PDT) Received: from [192.168.120.193] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c1c32c902d2sm742669366b.34.2026.07.28.05.12.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 28 Jul 2026 05:12:11 -0700 (PDT) Message-ID: <4f4a90d0-6ce1-4d99-9d9e-74678855a717@oss.qualcomm.com> Date: Tue, 28 Jul 2026 14:12:07 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 2/2] clk: qcom: Add LPASS VA CSR heartbeat pulse clock To: Sarath Ganapathiraju , andersson@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, bmasney@redhat.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, lgirdwood@gmail.com, broonie@kernel.org, perex@perex.cz, tiwai@suse.com, srinivas.kandagatla@oss.qualcomm.com Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org References: <20260723110231.1586417-1-sarath.ganapathiraju@oss.qualcomm.com> <20260723110231.1586417-3-sarath.ganapathiraju@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260723110231.1586417-3-sarath.ganapathiraju@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=fbidDUQF c=1 sm=1 tr=0 ts=6a689c9c cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=EUspDBNiAAAA:8 a=spIkkW4NbfvDwUr-CFkA:9 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzI4MDEwOCBTYWx0ZWRfXyii7lpftZE08 C9kqrSYAl1GuiKwW4n1dhYmzpN6CcdfnEztaFQH24REKnljjBd3xJEFxtdE52K9JSlbl9A3IJKR hf5drazawTA1jf4dePaCqHLoOgzL40g= X-Proofpoint-ORIG-GUID: oZKedY45i4OnSEOgBNZSHqFoXB3gY6l2 X-Proofpoint-GUID: oZKedY45i4OnSEOgBNZSHqFoXB3gY6l2 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzI4MDEwOCBTYWx0ZWRfX4oEHtjRfvRCo upVCU6HJTHerlGYkFFsOmkXBlnfDnhK7B/UDm5Clr1EC35sIA/gxYwPMTnGMOeJQdWKVq3o2gji 5vwfuJEhtapBUwTJWKQ1kAQN58Ehe04bIBneYt+EJZ/SgUBk6qLAe/9hkTsvf9t6RaAlp60FCts cWuOsCTKsvmPPyFDCeYTlWB9oUsztgsF6cOSrg3jsVDNbSWoxj+5f5RAKKNn9/ZbiedB6h3woKk VktoevcfwhhCnFT/gsuaDHA36Eebfk85Q++R9GTtNFfQIn5y5+XMYndRx4QqWEo2GeO285loFMF Ke1ZVOHi9NElZL9aqE+xqw6zjJ/AD6k/S9AIs1zbqZSHBy9l4wDmbNOjb7rb0+nrgE2DgNb3BlH 6E6E5FerDlAs44Sy0oP0oMIaZv93sE2kv2BwiyOX/7gPeavbfVAyUzo0fxHjMQ6ntJmwGLXmL73 yAoraEZEaaXb2r5l9Rg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-28_03,2026-07-28_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 bulkscore=0 suspectscore=0 clxscore=1015 impostorscore=0 phishscore=0 lowpriorityscore=0 malwarescore=0 adultscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607280108 On 7/23/26 1:02 PM, Sarath Ganapathiraju wrote: > The HeartBeat Pulse (also known as RateGen Pulse) synchronizes the > start of the DMAs and Codec Interfaces for the audio usecases and > can serve as a periodic wakeup source for the DSP. > > Add the LPASS VA CSR driver that models the rate generator as a clock > provider so it is enabled and disabled automatically alongside the > other clocks during runtime PM resume and suspend. > > Signed-off-by: Sarath Ganapathiraju > --- > drivers/clk/qcom/Kconfig | 12 +++ > drivers/clk/qcom/Makefile | 1 + > drivers/clk/qcom/lpass-va-csr.c | 143 ++++++++++++++++++++++++++++++++ > sound/soc/codecs/Kconfig | 1 + This patch spans 2 subsystems and 2 separate maintainers.. we'll need Mark's ack for the sound/ change > 4 files changed, 157 insertions(+) > create mode 100644 drivers/clk/qcom/lpass-va-csr.c > > diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig > index 63f271aff177..6ebdccfe37e0 100644 > --- a/drivers/clk/qcom/Kconfig > +++ b/drivers/clk/qcom/Kconfig > @@ -1998,6 +1998,18 @@ config CLK_GFM_LPASS_SM8250 > Support for the Glitch Free Mux (GFM) Low power audio > subsystem (LPASS) clocks found on SM8250 SoCs. > > +config QCOM_CLK_LPASS_VA_CSR VA_CSR is the Control-and-Status-Register space of the VA Macro, the name of the config should deifnitely focus on the heartbeat pulse clock generator within it instead Besides, that address space is huge, yet you're claiming it for a single simple clock. Exposing anything else from within there in the future will require bindings updates, which are usually a tough sell. Is there anything else in there that we need to cover from HLOS? Konrad