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DM4PR11MB7759.namprd11.prod.outlook.com (2603:10b6:8:10e::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.569.12; Thu, 5 Nov 2026 04:16:08 +0000 Received: from IA0PR11MB8379.namprd11.prod.outlook.com ([fe80::549f:e4b3:e10d:aaa6]) by IA0PR11MB8379.namprd11.prod.outlook.com ([fe80::549f:e4b3:e10d:aaa6%6]) with mapi id 15.21.0592.007; Thu, 5 Nov 2026 04:16:08 +0000 Message-ID: <4f656f59-9f2c-4774-9d9b-3a4d7b7b509d@intel.com> Date: Wed, 4 Nov 2026 20:16:05 -0800 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 4/5] selftests/resctrl: Use bandwidth values for AMD MBA schemata To: Swapnil Sapkal , , , , CC: , , , , , , , References: <20261022132517.46805-1-swapnil.sapkal@amd.com> <20261022132517.46805-5-swapnil.sapkal@amd.com> Content-Language: en-US From: Reinette Chatre In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-ClientProxiedBy: MW4PR03CA0306.namprd03.prod.outlook.com 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IA0PR11MB8379.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2026 04:16:08.6001 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: d5vplTSmcYytb7bjAgeUwJXh25PTDZwBTQG63HoJSePBKtkdZO31aZqXkKG3s8zOf3FNDztyjUCVd8kQevkI95wpYqFM2V+7+VW04L5dZ18= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR11MB7759 X-OriginatorOrg: intel.com Hi Swapnil, On 11/4/26 8:05 PM, Swapnil Sapkal wrote: > On 29-10-2026 00:15, Reinette Chatre wrote: >> On 10/22/26 6:25 AM, Swapnil Sapkal wrote: >> >>> diff --git a/tools/testing/selftests/resctrl/mba_test.c b/tools/testing/selftests/resctrl/mba_test.c >>> index 17ae73d3476c..947735e26099 100644 >>> --- a/tools/testing/selftests/resctrl/mba_test.c >>> +++ b/tools/testing/selftests/resctrl/mba_test.c >>> @@ -13,10 +13,51 @@ >>>   #define RESULT_FILE_NAME    "result_mba" >>>   #define NUM_OF_RUNS        5 >>>   #define MAX_DIFF_PERCENT    15 >>> + >>> +/* Intel MBA is specified as a percentage: 10%, 20% ... 100%. */ >> >> The percentage based interface is the generic interface and not Intel specific. >> You can drop "Intel" from references to this interface. >> > > Sure, will do. > >>>   #define ALLOCATION_MAX        100 >>>   #define ALLOCATION_MIN        10 >>>   #define ALLOCATION_STEP        10 >>>   +/* >>> + * AMD MBA is not a percentage but an absolute memory bandwidth value. The >>> + * test sweeps the bandwidth from 4 GB/s to 40 GB/s in steps of 4 GB/s, >>> + * which the hardware represents in units of 1/8 GB/s (i.e. 4 GB/s -> 32, >>> + * 8 GB/s -> 64, ... 40 GB/s -> 320). >>> + */ >>> +#define AMD_ALLOCATION_MAX    320 >> >> The AMD maximum is enumerated from hardware. How can it be ensured this is >> the appropriate maximum for all AMD systems? >> > > As Babu mentioned, it's difficult for a single-threaded workload to > reach the hardware-reported value. For that reason, I used these > values to verify whether throttling takes effect. Just to confirm, my question was not about needing this value to be the actual maximum of a system. Instead, I just wanted to confirm that this "320" value that is hardcoded here for all AMD systems is a _valid_ value. Since the actual maximum value is enumerated from hardware it is not obvious to me that all systems will support this hardcoded maximum. Reinette