From: Md Sadre Alam <md.alam@oss.qualcomm.com>
To: Gabor Juhos <j4g8y7@gmail.com>, Mark Brown <broonie@kernel.org>,
Sricharan Ramabadhran <quic_srichara@quicinc.com>,
Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] spi: spi-qpic-snand: avoid writing QPIC_EBI2_ECC_BUF_CFG register
Date: Thu, 10 Sep 2026 15:39:25 +0530 [thread overview]
Message-ID: <4f9af85e-0906-459d-a34a-37a0f13038fc@oss.qualcomm.com> (raw)
In-Reply-To: <20260909-qpic-snand-avoid-ebi2-reg-write-v1-1-9b1b1466cc75@gmail.com>
On 9/9/2026 7:38 PM, Gabor Juhos wrote:
> The description of commit bfb34eced559 ("mtd: rawnand: qcom: avoid writing
> to obsolete register") says this:
>
> "QPIC_EBI2_ECC_BUF_CFG register got obsolete from QPIC V2.0 onwards.
> Avoid writing this register if QPIC version is V2.0 or newer."
>
> Although the referenced commit is related to the 'qcom-nandc' driver,
> however the hardware supported by the current driver is also based on
> QPIC v2.0 so we should avoid writing that register here as well.
>
> Remove the register writing code to avoid undefined behaviour.
>
> Fixes: 7304d1909080 ("spi: spi-qpic: add driver for QCOM SPI NAND flash Interface")
> Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
> ---
> drivers/spi/spi-qpic-snand.c | 4 ----
> 1 file changed, 4 deletions(-)
>
> diff --git a/drivers/spi/spi-qpic-snand.c b/drivers/spi/spi-qpic-snand.c
> index 61b1f2eb19ce..05efe6313b7f 100644
> --- a/drivers/spi/spi-qpic-snand.c
> +++ b/drivers/spi/spi-qpic-snand.c
> @@ -765,8 +765,6 @@ static int qcom_spi_read_cw_raw(struct qcom_nand_controller *snandc, u8 *data_bu
>
> qcom_write_reg_dma(snandc, &snandc->regs->addr0, NAND_ADDR0, 2, 0);
> qcom_write_reg_dma(snandc, &snandc->regs->cfg0, NAND_DEV0_CFG0, 3, 0);
> - qcom_write_reg_dma(snandc, &snandc->regs->ecc_buf_cfg, NAND_EBI2_ECC_BUF_CFG, 1, 0);
> -
> qcom_write_reg_dma(snandc, &snandc->regs->erased_cw_detect_cfg_clr,
> NAND_ERASED_CW_DETECT_CFG, 1, 0);
> qcom_write_reg_dma(snandc, &snandc->regs->erased_cw_detect_cfg_set,
> @@ -1104,8 +1102,6 @@ static void qcom_spi_config_page_write(struct qcom_nand_controller *snandc)
> {
> qcom_write_reg_dma(snandc, &snandc->regs->addr0, NAND_ADDR0, 2, 0);
> qcom_write_reg_dma(snandc, &snandc->regs->cfg0, NAND_DEV0_CFG0, 3, 0);
> - qcom_write_reg_dma(snandc, &snandc->regs->ecc_buf_cfg, NAND_EBI2_ECC_BUF_CFG,
> - 1, NAND_BAM_NEXT_SGL);
> }
>
> static void qcom_spi_config_cw_write(struct qcom_nand_controller *snandc)
>
> ---
> base-commit: cb2ad3c020579bf51fb0d702db9cf64af9698377
> change-id: 20260909-qpic-snand-avoid-ebi2-reg-write-0920452b4b3b
>
> Best regards,
Reviewed-by: Md Sadre Alam <md.alam@oss.qualcomm.com>
next prev parent reply other threads:[~2026-09-10 10:09 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-09 14:08 Gabor Juhos
2026-09-10 10:09 ` Md Sadre Alam [this message]
2026-09-13 23:43 ` Mark Brown
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