From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id DA28B11CA0 for ; Mon, 30 Jun 2025 16:02:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751299367; cv=none; b=WmKKvUASZyBGBYHdRg+uUyZVn20LENFfzFEHB8T3EHezjPG2LXoYOo2Yle+MmDSnu6Nwa0CN0exHm18G9eGy+T4MU+ADfR3tHkJ3WWMk3L9KzsRxCHk9NTKIHeXEuEx7S0A8y69ZNFo+ZeF+a9zv1eCVubkHtGwykLhCTfh5D18= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751299367; c=relaxed/simple; bh=Zi+1XmdagaPSTpcVi/0p5EO5iuDuAYEqhxWFEE2ZU1M=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=XAHGmE3yUFfc04x7cATYaXCejlohZjghyO84oEeswoP6+5QzWc4Ez688TUYlwbvr+BMrKIdBr0tYy2poAhaqQ60oF7rxiCSnjKrbq3578BQmO01fvWXzoLiRbqwyY66Uzcx6ye8RoD6QQctinKHNOHo5aJi7cxTj3ZsF+n97SJ0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8F4F01AC1; Mon, 30 Jun 2025 09:02:29 -0700 (PDT) Received: from [10.57.28.116] (unknown [10.57.28.116]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 208093F66E; Mon, 30 Jun 2025 09:02:43 -0700 (PDT) Message-ID: <4fc84b43-77c4-45dc-8a74-9bba363054e3@arm.com> Date: Mon, 30 Jun 2025 17:02:41 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] drm/panthor: Wait for _READY register when powering on To: Boris Brezillon , Liviu Dudau , Karunika Choo Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org References: <20250630140704.432409-1-steven.price@arm.com> From: Steven Price Content-Language: en-GB In-Reply-To: <20250630140704.432409-1-steven.price@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 30/06/2025 15:07, Steven Price wrote: > panthor_gpu_block_power_on() takes a register offset (rdy_reg) for the > purpose of waiting for the power transition to complete. However, a > copy/paste error converting to use the new 64 register functions > switched it to using the pwrtrans_reg register instead. Fix the function > to use the correct register. > > Fixes: 4d230aa209ed ("drm/panthor: Add 64-bit and poll register accessors") > Signed-off-by: Steven Price Pushed to drm-misc-next. Thanks, Steve > --- > drivers/gpu/drm/panthor/panthor_gpu.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/panthor/panthor_gpu.c b/drivers/gpu/drm/panthor/panthor_gpu.c > index 534735518824..cb7a335e07d7 100644 > --- a/drivers/gpu/drm/panthor/panthor_gpu.c > +++ b/drivers/gpu/drm/panthor/panthor_gpu.c > @@ -297,8 +297,9 @@ int panthor_gpu_block_power_on(struct panthor_device *ptdev, > > gpu_write64(ptdev, pwron_reg, mask); > > - ret = gpu_read64_relaxed_poll_timeout(ptdev, pwrtrans_reg, val, > - !(mask & val), 100, timeout_us); > + ret = gpu_read64_relaxed_poll_timeout(ptdev, rdy_reg, val, > + (mask & val) == val, > + 100, timeout_us); > if (ret) { > drm_err(&ptdev->base, "timeout waiting on %s:%llx readiness", > blk_name, mask);