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From: Jan Kiszka <jan.kiszka@siemens.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: "Nishanth Menon" <nm@ti.com>,
	"Santosh Shilimkar" <ssantosh@kernel.org>,
	"Vignesh Raghavendra" <vigneshr@ti.com>,
	"Tero Kristo" <kristo@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
	"Siddharth Vadapalli" <s-vadapalli@ti.com>,
	"Bao Cheng Su" <baocheng.su@siemens.com>,
	"Hua Qian Li" <huaqian.li@siemens.com>,
	"Diogo Ivo" <diogo.ivo@siemens.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>
Subject: Re: [PATCH v4 2/7] dt-bindings: PCI: ti,am65: Extend for use with PVU
Date: Thu, 5 Sep 2024 08:40:55 +0200	[thread overview]
Message-ID: <4fd1d6e8-8a66-4eff-a995-5f947a4b707d@siemens.com> (raw)
In-Reply-To: <t2mqfu62xx5uztlintofp4pquv6jalzace6w5jpymyyarb2wmn@vvo23e4cmu57>

On 05.09.24 08:32, Krzysztof Kozlowski wrote:
> On Wed, Sep 04, 2024 at 12:00:11PM +0200, Jan Kiszka wrote:
>> From: Jan Kiszka <jan.kiszka@siemens.com>
>>
>> The PVU on the AM65 SoC is capable of restricting DMA from PCIe devices
>> to specific regions of host memory. Add the optional property
>> "memory-regions" to point to such regions of memory when PVU is used.
>>
>> Since the PVU deals with system physical addresses, utilizing the PVU
>> with PCIe devices also requires setting up the VMAP registers to map the
>> Requester ID of the PCIe device to the CBA Virtual ID, which in turn is
>> mapped to the system physical address. Hence, describe the VMAP
>> registers which are optionally unless the PVU shall used for PCIe.
>>
>> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
>> ---
>> CC: Lorenzo Pieralisi <lpieralisi@kernel.org>
>> CC: "Krzysztof Wilczyński" <kw@linux.com>
>> CC: Bjorn Helgaas <bhelgaas@google.com>
>> CC: linux-pci@vger.kernel.org
>> ---
>>  .../bindings/pci/ti,am65-pci-host.yaml        | 52 ++++++++++++++-----
>>  1 file changed, 40 insertions(+), 12 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
>> index 0a9d10532cc8..d8182bad92de 100644
>> --- a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
>> +++ b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
>> @@ -19,16 +19,6 @@ properties:
>>        - ti,am654-pcie-rc
>>        - ti,keystone-pcie
>>  
>> -  reg:
>> -    maxItems: 4
>> -
>> -  reg-names:
>> -    items:
>> -      - const: app
>> -      - const: dbics
>> -      - const: config
>> -      - const: atu
> 
> 
> Nothing improved here.

Yes, explained the background to you. Sorry, if you do not address my
replies, I'm lost with your feedback.

> 
>> -
>>    interrupts:
>>      maxItems: 1
>>  
>> @@ -84,12 +74,48 @@ if:
>>        enum:
>>          - ti,am654-pcie-rc
>>  then:
>> +  properties:
>> +    reg:
>> +      minItems: 4
>> +      maxItems: 6
>> +
>> +    reg-names:
>> +      minItems: 4
>> +      items:
>> +        - const: app
>> +        - const: dbics
>> +        - const: config
>> +        - const: atu
>> +        - const: vmap_lp
>> +        - const: vmap_hp
>> +
>> +    memory-region:
>> +      minItems: 1
> 
> Missing maxItems

Same as above. Please address my answers.

> 
>> +      description: |
>> +        phandle to one or more restricted DMA pools to be used for all devices
>> +        behind this controller. The regions should be defined according to
>> +        reserved-memory/shared-dma-pool.yaml.
>> +      items:
>> +        maxItems: 1
> 
> And this feels redundant.

I can drop that if it's not needed. Unfortunately, schemas are far from
being intuitive to me.

Jan

-- 
Siemens AG, Technology
Linux Expert Center


  reply	other threads:[~2024-09-05  6:41 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-04 10:00 [PATCH v4 0/7] soc: ti: Add and use PVU on K3-AM65 for DMA isolation Jan Kiszka
2024-09-04 10:00 ` [PATCH v4 1/7] dt-bindings: soc: ti: Add AM65 peripheral virtualization unit Jan Kiszka
2024-09-04 10:00 ` [PATCH v4 2/7] dt-bindings: PCI: ti,am65: Extend for use with PVU Jan Kiszka
2024-09-04 10:16   ` Siddharth Vadapalli
2024-09-04 11:47     ` Jan Kiszka
2024-09-05  6:32   ` Krzysztof Kozlowski
2024-09-05  6:40     ` Jan Kiszka [this message]
2024-09-05  6:53       ` Krzysztof Kozlowski
2024-09-05  7:15         ` Jan Kiszka
2024-09-05  7:50           ` Krzysztof Kozlowski
2024-09-05  7:56             ` Krzysztof Kozlowski
2024-09-06  7:00               ` Jan Kiszka
2024-09-05  6:57   ` Krzysztof Kozlowski
2024-09-05  7:16     ` Jan Kiszka
2024-09-05  7:52       ` Krzysztof Kozlowski
2024-09-06  7:13       ` Jan Kiszka
2024-09-05 16:37   ` Bjorn Helgaas
2024-09-04 10:00 ` [PATCH v4 3/7] soc: ti: Add IOMPU-like PVU driver Jan Kiszka
2024-09-04 10:00 ` [PATCH v4 4/7] PCI: keystone: Add supported for PVU-based DMA isolation on AM654 Jan Kiszka
2024-09-05 16:33   ` Bjorn Helgaas
2024-09-05 19:07     ` Jan Kiszka
2024-09-05 19:16       ` Bjorn Helgaas
2024-09-06  6:24       ` Jan Kiszka
2024-09-04 10:00 ` [PATCH v4 5/7] arm64: dts: ti: k3-am65-main: Add PVU nodes Jan Kiszka
2024-09-04 10:00 ` [PATCH v4 6/7] arm64: dts: ti: k3-am65-main: Add VMAP registers to PCI root complexes Jan Kiszka
2024-09-04 10:00 ` [PATCH v4 7/7] arm64: dts: ti: iot2050: Enforce DMA isolation for devices behind PCI RC on Advanced Jan Kiszka

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