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	id 1tmPGz-00H1nK-MA; Mon, 24 Feb 2025 04:36:49 +0100
Date: Mon, 24 Feb 2025 04:36:49 +0100
From: Andrew Lunn <andrew@lunn.ch>
To: Maxime Chevallier <maxime.chevallier@bootlin.com>
Cc: davem@davemloft.net, Jakub Kicinski <kuba@kernel.org>,
	Eric Dumazet <edumazet@google.com>, Paolo Abeni <pabeni@redhat.com>,
	Russell King <linux@armlinux.org.uk>,
	Heiner Kallweit <hkallweit1@gmail.com>, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org, thomas.petazzoni@bootlin.com,
	Florian Fainelli <f.fainelli@gmail.com>,
	=?iso-8859-1?Q?K=F6ry?= Maincent <kory.maincent@bootlin.com>,
	Simon Horman <horms@kernel.org>,
	Romain Gantois <romain.gantois@bootlin.com>,
	Antoine Tenart <atenart@kernel.org>,
	Marek =?iso-8859-1?Q?Beh=FAn?= <kabel@kernel.org>
Subject: Re: [PATCH net-next 2/2] net: mdio: mdio-i2c: Add support for
 single-byte SMBus operations
Message-ID: <4ff4113d-f97d-4d40-bd7e-cdba6f30b6ee@lunn.ch>
References: <20250223172848.1098621-1-maxime.chevallier@bootlin.com>
 <20250223172848.1098621-3-maxime.chevallier@bootlin.com>
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In-Reply-To: <20250223172848.1098621-3-maxime.chevallier@bootlin.com>

> This was only tested on Copper SFP modules that embed a Marvell 88e1111
> PHY.

Does the Marvell PHY datasheet say what happens when you perform 8 bit
accesses to 16 bit registers, such at the BMSR?

	Andrew