From: Jon Hourd <jonhourd@telus.net>
To: davej@suse.de
Cc: linux-kernel@vger.kernel.org
Subject: [PATCH] 2.4.18 - 2.5.7 bluesmoke.c corrected MCA setup for different Pentium cores.
Date: Fri, 22 Mar 2002 10:05:16 -0800 [thread overview]
Message-ID: <5.1.0.14.0.20020322094928.009e6ec0@pop.telus.net> (raw)
[-- Attachment #1: Type: text/plain, Size: 401 bytes --]
Hello,
Here are some patches to correct the MCA setup for different Pentium cores
in bluesmoke.c. The P6 family must not initialize MSR_IA32_MC0_CTL in
software, it must be done by the bios. The P4/Xeon cores must have this
bank initialized in software. Added check for processor type and
associated init loops. Included patches against 2.5.7 and 2.4.18.
Cheers,
Jon Hourd
jonhourd@telus.net
[-- Attachment #2: bluesmoke.c.patch.2.5.7 --]
[-- Type: application/octet-stream, Size: 1810 bytes --]
--- bluesmoke.c Fri Mar 22 01:00:46 2002
+++ bluesmoke.c.new Fri Mar 22 01:00:16 2002
@@ -3,9 +3,12 @@
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
+#include <linux/config.h>
#include <asm/processor.h>
#include <asm/msr.h>
+#ifdef CONFIG_X86_MCE
+
static int mce_disabled __initdata = 0;
/*
@@ -41,13 +44,12 @@
if(high&(1<<27))
{
rdmsr(MSR_IA32_MC0_MISC+i*4, alow, ahigh);
- printk("[%08x%08x]", alow, ahigh);
+ printk("[%08x%08x]", ahigh, alow);
}
if(high&(1<<26))
{
rdmsr(MSR_IA32_MC0_ADDR+i*4, alow, ahigh);
- printk(" at %08x%08x",
- high, low);
+ printk(" at %08x%08x", ahigh, alow);
}
printk("\n");
/* Clear it */
@@ -167,9 +169,25 @@
if(l&(1<<8))
wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
banks = l&0xff;
- for(i=1;i<banks;i++)
- {
- wrmsr(MSR_IA32_MC0_CTL+4*i, 0xffffffff, 0xffffffff);
+
+ /* Check Core version for P6 or P4/Xeon */
+
+ if(c->x86 == 6) {
+ printk(KERN_INFO "Detected P6 Core.\n");
+ for(i=1;i<banks;i++) /* Must start with bank 1 for P6 Cores */
+ {
+ wrmsr(MSR_IA32_MC0_CTL+4*i, 0xffffffff, 0xffffffff);
+ }
+ } else if(c->x86 == 15) {
+ printk(KERN_INFO "Detected P4/Xeon Core.\n");
+ for(i=0;i<banks;i++) /* Must start with bank 0 for Pentium 4 and Xeon Processors */
+ {
+ wrmsr(MSR_IA32_MC0_CTL+4*i, 0xffffffff, 0xffffffff);
+ }
+ } else {
+ printk(KERN_INFO "Unknown Processor. Machine check architecture not enabled on CPU#%d.\n", smp_processor_id());
+ done = 1;
+ return;
}
for(i=0;i<banks;i++)
{
@@ -247,3 +265,9 @@
__setup("nomce", mcheck_disable);
__setup("mce", mcheck_enable);
+
+#else
+asmlinkage void do_machine_check(struct pt_regs * regs, long error_code) {}
+void __init mcheck_init(struct cpuinfo_x86 *c) {}
+#endif
+
[-- Attachment #3: bluesmoke.c.patch.2.4.18 --]
[-- Type: application/octet-stream, Size: 1812 bytes --]
--- bluesmoke.c Fri Mar 22 01:01:19 2002
+++ bluesmoke.c.new Fri Mar 22 01:00:16 2002
@@ -3,9 +3,12 @@
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
+#include <linux/config.h>
#include <asm/processor.h>
#include <asm/msr.h>
+#ifdef CONFIG_X86_MCE
+
static int mce_disabled __initdata = 0;
/*
@@ -41,13 +44,12 @@
if(high&(1<<27))
{
rdmsr(MSR_IA32_MC0_MISC+i*4, alow, ahigh);
- printk("[%08x%08x]", alow, ahigh);
+ printk("[%08x%08x]", ahigh, alow);
}
if(high&(1<<26))
{
rdmsr(MSR_IA32_MC0_ADDR+i*4, alow, ahigh);
- printk(" at %08x%08x",
- ahigh, alow);
+ printk(" at %08x%08x", ahigh, alow);
}
printk("\n");
/* Clear it */
@@ -167,9 +169,25 @@
if(l&(1<<8))
wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
banks = l&0xff;
- for(i=1;i<banks;i++)
- {
- wrmsr(MSR_IA32_MC0_CTL+4*i, 0xffffffff, 0xffffffff);
+
+ /* Check Core version for P6 or P4/Xeon */
+
+ if(c->x86 == 6) {
+ printk(KERN_INFO "Detected P6 Core.\n");
+ for(i=1;i<banks;i++) /* Must start with bank 1 for P6 Cores */
+ {
+ wrmsr(MSR_IA32_MC0_CTL+4*i, 0xffffffff, 0xffffffff);
+ }
+ } else if(c->x86 == 15) {
+ printk(KERN_INFO "Detected P4/Xeon Core.\n");
+ for(i=0;i<banks;i++) /* Must start with bank 0 for Pentium 4 and Xeon Processors */
+ {
+ wrmsr(MSR_IA32_MC0_CTL+4*i, 0xffffffff, 0xffffffff);
+ }
+ } else {
+ printk(KERN_INFO "Unknown Processor. Machine check architecture not enabled on CPU#%d.\n", smp_processor_id());
+ done = 1;
+ return;
}
for(i=0;i<banks;i++)
{
@@ -247,3 +265,9 @@
__setup("nomce", mcheck_disable);
__setup("mce", mcheck_enable);
+
+#else
+asmlinkage void do_machine_check(struct pt_regs * regs, long error_code) {}
+void __init mcheck_init(struct cpuinfo_x86 *c) {}
+#endif
+
next reply other threads:[~2002-03-22 18:04 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-03-22 18:05 Jon Hourd [this message]
2002-03-22 18:14 ` Dave Jones
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