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[199.106.103.254]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-12dc81d0c73sm3673850c88.7.2026.04.24.14.49.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 24 Apr 2026 14:49:35 -0700 (PDT) Message-ID: <5008f174-340e-41a7-9dcf-f09495c1fcf9@oss.qualcomm.com> Date: Fri, 24 Apr 2026 14:49:34 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 4/5] media: qcom: camss: Fix RDI streaming for CSID GEN3 To: bod@kernel.org, Robert Foss , Todor Tomov , Bryan O'Donoghue , Vladimir Zapolskiy , Mauro Carvalho Chehab , Hans Verkuil , Loic Poulain , Hans Verkuil , Gjorgji Rosikopulos , Milen Mitkov , Depeng Shao , Yongsheng Li Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org References: <20260407-camss-rdi-fix-v3-0-08f72d1f3442@kernel.org> <20260407-camss-rdi-fix-v3-4-08f72d1f3442@kernel.org> Content-Language: en-US From: Vijay Kumar Tumati In-Reply-To: <20260407-camss-rdi-fix-v3-4-08f72d1f3442@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: mK1OQHbZtnmDjMhaj_SiGX0ABKrffmpd X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDI0MDIxMyBTYWx0ZWRfX/wA26ONLFNoI zMQr/vV9nX5mXrXM0TIcPlG1OjEdZl4iX0O+1SjknfZIM4xdlRjai9+3OpMu0zS6+ZXzYXOdIIg Dabti5qm695WncZgV2gcQ6N+Lt4plJPy1sWNYkKRhSeW0jLWIC05FJdW2ra7hCXTYaATp7rg9SV 962FHmGk4JBCF/6SZmp7i9B3ysqvyKoA/aXS18hxt0LZpJ/UVZnkl9NScx5NSy9FFaGdtjJ3Abt cOf1+PXQ3QAOlJkvf+6nr+hVpyFIfITuKhBXf9YLFO4Fvq+DE6EOL7hYss5XGTRyIaT8XQGCYof YtYINST79A5ejtNoSLXkfd4kASBOm6W/YNAmUlH4Oa10n5g6gJb5eIO4/m6Tc54awjYifPx+bFJ dUMQqZc9bZ4+5odcU+1tU1SqluVKLQ1w08O0HMs6DYycJwZxjWgUrqx2fG3KRmOZrzTqF90O8rG E17/IlSjd6j0tVelH3Q== X-Proofpoint-ORIG-GUID: mK1OQHbZtnmDjMhaj_SiGX0ABKrffmpd X-Authority-Analysis: v=2.4 cv=X+li7mTe c=1 sm=1 tr=0 ts=69ebe571 cx=c_pps a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=VwQbUJbxAAAA:8 a=KKAkSRfTAAAA:8 a=LgFBGBsrqOKMokOYI4YA:9 a=QEXdDO2ut3YA:10 a=bBxd6f-gb0O0v-kibOvt:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-24_03,2026-04-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 bulkscore=0 priorityscore=1501 suspectscore=0 clxscore=1015 impostorscore=0 spamscore=0 phishscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604240213 Hi Bryan, On 4/7/2026 3:34 AM, bod@kernel.org wrote: > From: Bryan O'Donoghue > > Fix streaming from CSIDn RDI1 and RDI2 to VFEn RDI1 and RDI2. A pattern we > have replicated throughout CAMSS where we use the VC number to populate > both the VC fields and port fields of the CSID means that in practice only > VC = 0 on CSIDn:RDI0 to VFEn:RDI0 works. > > Fix that for CSID gen3 by separating VC and port. Fix to VC zero as a > bugfix we will look to properly populate the VC field with follow on > patches later. > > Fixes: d96fe1808dcc ("media: qcom: camss: Add CSID 780 support") > Cc: stable@vger.kernel.org > Signed-off-by: Bryan O'Donoghue > --- > .../media/platform/qcom/camss/camss-csid-gen3.c | 28 +++++++++++----------- > 1 file changed, 14 insertions(+), 14 deletions(-) > > diff --git a/drivers/media/platform/qcom/camss/camss-csid-gen3.c b/drivers/media/platform/qcom/camss/camss-csid-gen3.c > index bd059243790ed..ed5c5766efd36 100644 > --- a/drivers/media/platform/qcom/camss/camss-csid-gen3.c > +++ b/drivers/media/platform/qcom/camss/camss-csid-gen3.c > @@ -145,12 +145,12 @@ static void __csid_configure_wrapper(struct csid_device *csid) > writel(val, csid->camss->csid_wrapper_base + CSID_IO_PATH_CFG0(csid->id)); > } > > -static void __csid_configure_rdi_stream(struct csid_device *csid, u8 enable, u8 vc) > +static void __csid_configure_rdi_stream(struct csid_device *csid, u8 enable, u8 port, u8 vc) > { > u32 val; > u8 lane_cnt = csid->phy.lane_cnt; > /* Source pads matching RDI channels on hardware. Pad 1 -> RDI0, Pad 2 -> RDI1, etc. */ > - struct v4l2_mbus_framefmt *input_format = &csid->fmt[MSM_CSID_PAD_FIRST_SRC + vc]; > + struct v4l2_mbus_framefmt *input_format = &csid->fmt[MSM_CSID_PAD_FIRST_SRC + port]; > const struct csid_format_info *format = csid_get_fmt_entry(csid->res->formats->formats, > csid->res->formats->nformats, > input_format->code); > @@ -163,14 +163,14 @@ static void __csid_configure_rdi_stream(struct csid_device *csid, u8 enable, u8 > * the four least significant bits of the five bit VC > * bitfield to generate an internal CID value. > * > - * CSID_RDI_CFG0(vc) > + * CSID_RDI_CFG0(port) > * DT_ID : 28:27 > * VC : 26:22 > * DT : 21:16 > * > * CID : VC 3:0 << 2 | DT_ID 1:0 > */ > - u8 dt_id = vc & 0x03; > + u8 dt_id = port & 0x03; Sorry if I was late, I think this is wrong. DT_ID is more to shrink the data type of a stream from the sensor into 2 bits so that the number of configurations to be maintained in the CSID are less, the way the HW logic was on previous architectures. Now, the older SW logic of deriving it from VC itself was wrong and making it port based that doesn't have anything at all to the DT_ID or CID is making it worse. Do you want to just maintain the older logic here? > > val = RDI_CFG0_TIMESTAMP_EN; > val |= RDI_CFG0_TIMESTAMP_STB_SEL; > @@ -180,7 +180,7 @@ static void __csid_configure_rdi_stream(struct csid_device *csid, u8 enable, u8 > val |= format->data_type << RDI_CFG0_DT; > val |= dt_id << RDI_CFG0_DT_ID; > > - writel(val, csid->base + CSID_RDI_CFG0(vc)); > + writel(val, csid->base + CSID_RDI_CFG0(port)); > > val = RDI_CFG1_PACKING_FORMAT_MIPI; > val |= RDI_CFG1_PIX_STORE; > @@ -189,22 +189,22 @@ static void __csid_configure_rdi_stream(struct csid_device *csid, u8 enable, u8 > val |= RDI_CFG1_CROP_H_EN; > val |= RDI_CFG1_CROP_V_EN; > > - writel(val, csid->base + CSID_RDI_CFG1(vc)); > + writel(val, csid->base + CSID_RDI_CFG1(port)); > > val = 0; > - writel(val, csid->base + CSID_RDI_IRQ_SUBSAMPLE_PERIOD(vc)); > + writel(val, csid->base + CSID_RDI_IRQ_SUBSAMPLE_PERIOD(port)); > > val = 1; > - writel(val, csid->base + CSID_RDI_IRQ_SUBSAMPLE_PATTERN(vc)); > + writel(val, csid->base + CSID_RDI_IRQ_SUBSAMPLE_PATTERN(port)); > > val = 0; > - writel(val, csid->base + CSID_RDI_CTRL(vc)); > + writel(val, csid->base + CSID_RDI_CTRL(port)); > > - val = readl(csid->base + CSID_RDI_CFG0(vc)); > + val = readl(csid->base + CSID_RDI_CFG0(port)); > > if (enable) > val |= RDI_CFG0_EN; > - writel(val, csid->base + CSID_RDI_CFG0(vc)); > + writel(val, csid->base + CSID_RDI_CFG0(port)); > } > > static void csid_configure_stream(struct csid_device *csid, u8 enable) > @@ -213,11 +213,11 @@ static void csid_configure_stream(struct csid_device *csid, u8 enable) > > __csid_configure_wrapper(csid); > > - /* Loop through all enabled VCs and configure stream for each */ > + /* Loop through all enabled ports and configure a stream for each */ > for (i = 0; i < MSM_CSID_MAX_SRC_STREAMS; i++) > if (csid->phy.en_vc & BIT(i)) { > - __csid_configure_rdi_stream(csid, enable, i); > - __csid_configure_rx(csid, &csid->phy, i); > + __csid_configure_rdi_stream(csid, enable, i, 0); > + __csid_configure_rx(csid, &csid->phy, 0); > __csid_ctrl_rdi(csid, enable, i); > } > } > Thanks, Vijay.