From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1031083Ab2HIPWO (ORCPT ); Thu, 9 Aug 2012 11:22:14 -0400 Received: from nat28.tlf.novell.com ([130.57.49.28]:48067 "EHLO nat28.tlf.novell.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030897Ab2HIPWM convert rfc822-to-8bit (ORCPT ); Thu, 9 Aug 2012 11:22:12 -0400 Message-Id: <5023F1BC0200007800093EF0@nat28.tlf.novell.com> X-Mailer: Novell GroupWise Internet Agent 12.0.0 Date: Thu, 09 Aug 2012 16:22:04 +0100 From: "Jan Beulich" To: "Andi Kleen" , "Kirill A. Shutemov" Cc: "Andy Lutomirski" , "Robert Richter" , "Johannes Weiner" , "Hugh Dickins" , "Alex Shi" , "KAMEZAWA Hiroyuki" , , , "Thomas Gleixner" , "Andrew Morton" , , "Tim Chen" , , "Andrea Arcangeli" , "Ingo Molnar" , "Mel Gorman" , , , , "H. Peter Anvin" Subject: Re: [PATCH v2 4/6] x86: Add clear_page_nocache References: <1344524583-1096-1-git-send-email-kirill.shutemov@linux.intel.com> <1344524583-1096-5-git-send-email-kirill.shutemov@linux.intel.com> In-Reply-To: <1344524583-1096-5-git-send-email-kirill.shutemov@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 8BIT Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org >>> On 09.08.12 at 17:03, "Kirill A. Shutemov" wrote: > From: Andi Kleen > > Add a cache avoiding version of clear_page. Straight forward integer variant > of the existing 64bit clear_page, for both 32bit and 64bit. While on 64-bit this is fine, I fail to see how you avoid using the SSE2 instruction on non-SSE2 systems. > Also add the necessary glue for highmem including a layer that non cache > coherent architectures that use the virtual address for flushing can > hook in. This is not needed on x86 of course. > > If an architecture wants to provide cache avoiding version of clear_page > it should to define ARCH_HAS_USER_NOCACHE to 1 and implement > clear_page_nocache() and clear_user_highpage_nocache(). > > Signed-off-by: Andi Kleen > Signed-off-by: Kirill A. Shutemov > --- > arch/x86/include/asm/page.h | 2 ++ > arch/x86/include/asm/string_32.h | 5 +++++ > arch/x86/include/asm/string_64.h | 5 +++++ > arch/x86/lib/Makefile | 1 + > arch/x86/lib/clear_page_nocache_32.S | 30 ++++++++++++++++++++++++++++++ > arch/x86/lib/clear_page_nocache_64.S | 29 +++++++++++++++++++++++++++++ Couldn't this more reasonably go into clear_page_{32,64}.S? > arch/x86/mm/fault.c | 7 +++++++ > 7 files changed, 79 insertions(+), 0 deletions(-) > create mode 100644 arch/x86/lib/clear_page_nocache_32.S > create mode 100644 arch/x86/lib/clear_page_nocache_64.S >... >--- /dev/null >+++ b/arch/x86/lib/clear_page_nocache_32.S >@@ -0,0 +1,30 @@ >+#include >+#include >+ >+/* >+ * Zero a page avoiding the caches >+ * rdi page Wrong comment. >+ */ >+ENTRY(clear_page_nocache) >+ CFI_STARTPROC >+ mov %eax,%edi You need to pick a different register here (e.g. %edx), since %edi has to be preserved by all functions called from C. >+ xorl %eax,%eax >+ movl $4096/64,%ecx >+ .p2align 4 >+.Lloop: >+ decl %ecx >+#define PUT(x) movnti %eax,x*8(%edi) ; movnti %eax,x*8+4(%edi) Is doing twice as much unrolling as on 64-bit really worth it? Jan