From: Alexandre TORGUE <alexandre.torgue@foss.st.com>
To: Marek Vasut <marex@nabladev.com>, <linux-arm-kernel@lists.infradead.org>
Cc: Bartosz Golaszewski <brgl@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Linus Walleij <linusw@kernel.org>, Rob Herring <robh@kernel.org>,
<devicetree@vger.kernel.org>, <kernel@dh-electronics.com>,
<linux-gpio@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-stm32@st-md-mailman.stormreply.com>
Subject: Re: [PATCH 08/10] arm64: dts: st: Add pinmux nodes for DH electronics STM32MP23xx/STM32MP25xx DHCOS SoM and Breakout Board
Date: Mon, 28 Sep 2026 11:02:32 +0200 [thread overview]
Message-ID: <502b58ee-2421-41d2-bdfa-a870ba8e325c@foss.st.com> (raw)
In-Reply-To: <20260711210131.236025-9-marex@nabladev.com>
Hi Marek
On 7/11/26 22:59, Marek Vasut wrote:
> Add new pinmux nodes for DH electronics STM32MP2 DHCOS SoM and BB board.
> The following pinmux nodes are added:
> - ETH2 pins
> - I2C8 pins
> - MCO1 pins
> - SDMMC1,2,3 pins
> - SPI1,8 pins
> - UART8,9 pins
> - USART1,2,6 pins
>
> Signed-off-by: Marek Vasut <marex@nabladev.com>
> ---
> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
> Cc: Bartosz Golaszewski <brgl@kernel.org>
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
> Cc: Linus Walleij <linusw@kernel.org>
> Cc: Rob Herring <robh@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: kernel@dh-electronics.com
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-gpio@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-stm32@st-md-mailman.stormreply.com
> ---
> arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 564 ++++++++++++++++++
> 1 file changed, 564 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
> index 456ece7f8ebc3..1aadbc6b47da9 100644
> --- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
> +++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
> @@ -182,6 +182,30 @@ pins5 {
> };
> };
>
> + /omit-if-no-ref/
> + eth2_mdio_pins_a: eth2-mdio-0 {
> + pins1 {
> + pinmux = <STM32_PINMUX('G', 4, AF11)>; /* ETH_MDC */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <3>;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('C', 5, AF10)>; /* ETH_MDIO */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + eth2_mdio_sleep_pins_a: eth2-mdio-sleep-0 {
> + pins {
> + pinmux = <STM32_PINMUX('C', 6, ANALOG)>, /* ETH_MDC */
I assume it is G4 for MDC ? If yes I fix it when I apply.
> + <STM32_PINMUX('C', 5, ANALOG)>; /* ETH_MDIO */
> + };
> + };
> +
> /omit-if-no-ref/
> eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-0 {
> pins {
> @@ -203,6 +227,68 @@ pins {
> };
> };
>
> + /omit-if-no-ref/
> + eth2_rgmii_pins_b: eth2-rgmii-1 {
> + pins1 {
> + pinmux = <STM32_PINMUX('C', 7, AF10)>, /* ETH_RGMII_TXD0 */
> + <STM32_PINMUX('C', 8, AF10)>, /* ETH_RGMII_TXD1 */
> + <STM32_PINMUX('C', 9, AF10)>, /* ETH_RGMII_TXD2 */
> + <STM32_PINMUX('C', 10, AF10)>, /* ETH_RGMII_TXD3 */
> + <STM32_PINMUX('C', 4, AF10)>; /* ETH_RGMII_TX_CTL */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <3>;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('F', 8, AF10)>, /* ETH_RGMII_CLK125 */
> + <STM32_PINMUX('F', 7, AF10)>; /* ETH_MDC */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <3>;
> + };
> + pins3 {
> + pinmux = <STM32_PINMUX('G', 0, AF10)>, /* ETH_RGMII_RXD0 */
> + <STM32_PINMUX('C', 12, AF10)>, /* ETH_RGMII_RXD1 */
> + <STM32_PINMUX('F', 9, AF10)>, /* ETH_RGMII_RXD2 */
> + <STM32_PINMUX('C', 11, AF10)>, /* ETH_RGMII_RXD3 */
> + <STM32_PINMUX('C', 3, AF10)>; /* ETH_RGMII_RX_CTL */
> + bias-disable;
> + };
> + pins4 {
> + pinmux = <STM32_PINMUX('F', 6, AF10)>; /* ETH_RGMII_RX_CLK */
> + bias-disable;
> + };
> + };
> +
> + /omit-if-no-ref/
> + eth2_rgmii_sleep_pins_b: eth2-rgmii-sleep-1 {
> + pins {
> + pinmux = <STM32_PINMUX('C', 7, ANALOG)>, /* ETH_RGMII_TXD0 */
> + <STM32_PINMUX('C', 8, ANALOG)>, /* ETH_RGMII_TXD1 */
> + <STM32_PINMUX('C', 9, ANALOG)>, /* ETH_RGMII_TXD2 */
> + <STM32_PINMUX('C', 10, ANALOG)>, /* ETH_RGMII_TXD3 */
> + <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_TX_CTL */
> + <STM32_PINMUX('F', 8, ANALOG)>, /* ETH_RGMII_CLK125 */
> + <STM32_PINMUX('F', 7, ANALOG)>, /* ETH_RGMII_GTX_CLK */
> + <STM32_PINMUX('G', 0, ANALOG)>, /* ETH_RGMII_RXD0 */
> + <STM32_PINMUX('C', 12, ANALOG)>, /* ETH_RGMII_RXD1 */
> + <STM32_PINMUX('F', 9, ANALOG)>, /* ETH_RGMII_RXD2 */
> + <STM32_PINMUX('C', 11, ANALOG)>, /* ETH_RGMII_RXD3 */
> + <STM32_PINMUX('C', 3, ANALOG)>, /* ETH_RGMII_RX_CTL */
> + <STM32_PINMUX('F', 6, ANALOG)>; /* ETH_RGMII_RX_CLK */
> + };
> + };
> +
> + /omit-if-no-ref/
> + mco1_pins_a: mco1-0 {
> + pins {
> + pinmux = <STM32_PINMUX('I', 6, AF1)>; /* MCO1 */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <2>;
> + };
> + };
> +
> /omit-if-no-ref/
> i2c2_pins_a: i2c2-0 {
> pins {
> @@ -394,6 +480,26 @@ pins2 {
> };
> };
>
> + /omit-if-no-ref/
> + sdmmc1_b4_pins_b: sdmmc1-b4-1 {
> + pins1 {
> + pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */
> + <STM32_PINMUX('E', 5, AF10)>, /* SDMMC1_D1 */
> + <STM32_PINMUX('E', 0, AF10)>, /* SDMMC1_D2 */
> + <STM32_PINMUX('E', 1, AF10)>, /* SDMMC1_D3 */
> + <STM32_PINMUX('E', 2, AF10)>; /* SDMMC1_CMD */
> + slew-rate = <1>;
> + drive-push-pull;
> + bias-disable;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC1_CK */
> + slew-rate = <2>;
> + drive-push-pull;
> + bias-disable;
> + };
> + };
> +
> /omit-if-no-ref/
> sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
> pins1 {
> @@ -419,6 +525,31 @@ pins3 {
> };
> };
>
> + /omit-if-no-ref/
> + sdmmc1_b4_od_pins_b: sdmmc1-b4-od-1 {
> + pins1 {
> + pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */
> + <STM32_PINMUX('E', 5, AF10)>, /* SDMMC1_D1 */
> + <STM32_PINMUX('E', 0, AF10)>, /* SDMMC1_D2 */
> + <STM32_PINMUX('E', 1, AF10)>; /* SDMMC1_D3 */
> + slew-rate = <1>;
> + drive-push-pull;
> + bias-disable;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC1_CK */
> + slew-rate = <2>;
> + drive-push-pull;
> + bias-disable;
> + };
> + pins3 {
> + pinmux = <STM32_PINMUX('E', 2, AF10)>; /* SDMMC1_CMD */
> + slew-rate = <1>;
> + drive-open-drain;
> + bias-disable;
> + };
> + };
> +
> /omit-if-no-ref/
> sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
> pins {
> @@ -431,6 +562,187 @@ pins {
> };
> };
>
> + /omit-if-no-ref/
> + sdmmc2_b4_pins_a: sdmmc2-b4-0 {
> + pins1 {
> + pinmux = <STM32_PINMUX('E', 13, AF12)>, /* SDMMC2_D0 */
> + <STM32_PINMUX('E', 11, AF12)>, /* SDMMC2_D1 */
> + <STM32_PINMUX('E', 8, AF12)>, /* SDMMC2_D2 */
> + <STM32_PINMUX('E', 12, AF12)>, /* SDMMC2_D3 */
> + <STM32_PINMUX('E', 15, AF12)>; /* SDMMC2_CMD */
> + slew-rate = <1>;
> + drive-push-pull;
> + bias-pull-up;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('E', 14, AF12)>; /* SDMMC2_CK */
> + slew-rate = <2>;
> + drive-push-pull;
> + bias-pull-up;
> + };
> + };
> +
> + /omit-if-no-ref/
> + sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
> + pins1 {
> + pinmux = <STM32_PINMUX('E', 13, AF12)>, /* SDMMC2_D0 */
> + <STM32_PINMUX('E', 11, AF12)>, /* SDMMC2_D1 */
> + <STM32_PINMUX('E', 8, AF12)>, /* SDMMC2_D2 */
> + <STM32_PINMUX('E', 12, AF12)>; /* SDMMC2_D3 */
> + slew-rate = <1>;
> + drive-push-pull;
> + bias-pull-up;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('E', 14, AF12)>; /* SDMMC2_CK */
> + slew-rate = <2>;
> + drive-push-pull;
> + bias-pull-up;
> + };
> + pins3 {
> + pinmux = <STM32_PINMUX('E', 15, AF12)>; /* SDMMC2_CMD */
> + slew-rate = <1>;
> + drive-open-drain;
> + bias-pull-up;
> + };
> + };
> +
> + /omit-if-no-ref/
> + sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
> + pins {
> + pinmux = <STM32_PINMUX('E', 13, ANALOG)>, /* SDMMC2_D0 */
> + <STM32_PINMUX('E', 11, ANALOG)>, /* SDMMC2_D1 */
> + <STM32_PINMUX('E', 8, ANALOG)>, /* SDMMC2_D2 */
> + <STM32_PINMUX('E', 12, ANALOG)>, /* SDMMC2_D3 */
> + <STM32_PINMUX('E', 14, ANALOG)>, /* SDMMC2_CK */
> + <STM32_PINMUX('E', 15, ANALOG)>; /* SDMMC2_CMD */
> + };
> + };
> +
> + /omit-if-no-ref/
> + sdmmc2_d47_pins_a: sdmmc2-d47-0 {
> + pins {
> + pinmux = <STM32_PINMUX('E', 10, AF12)>, /* SDMMC2_D4 */
> + <STM32_PINMUX('E', 9, AF12)>, /* SDMMC2_D5 */
> + <STM32_PINMUX('E', 6, AF12)>, /* SDMMC2_D6 */
> + <STM32_PINMUX('E', 7, AF12)>; /* SDMMC2_D7 */
> + slew-rate = <1>;
> + drive-push-pull;
> + bias-pull-up;
> + };
> + };
> +
> + /omit-if-no-ref/
> + sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
> + pins {
> + pinmux = <STM32_PINMUX('E', 10, ANALOG)>, /* SDMMC2_D4 */
> + <STM32_PINMUX('E', 9, ANALOG)>, /* SDMMC2_D5 */
> + <STM32_PINMUX('E', 6, ANALOG)>, /* SDMMC2_D6 */
> + <STM32_PINMUX('E', 7, ANALOG)>; /* SDMMC2_D7 */
> + };
> + };
> +
> + /omit-if-no-ref/
> + sdmmc3_b4_pins_a: sdmmc3-b4-0 {
> + pins1 {
> + pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC3_D0 */
> + <STM32_PINMUX('D', 13, AF10)>, /* SDMMC3_D1 */
> + <STM32_PINMUX('B', 12, AF10)>, /* SDMMC3_D2 */
> + <STM32_PINMUX('I', 11, AF10)>, /* SDMMC3_D3 */
> + <STM32_PINMUX('D', 12, AF10)>; /* SDMMC3_CMD */
> + slew-rate = <0>;
> + drive-push-pull;
> + bias-pull-up;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('B', 13, AF10)>; /* SDMMC3_CK */
> + slew-rate = <1>;
> + drive-push-pull;
> + bias-pull-up;
> + };
> + };
> +
> + /omit-if-no-ref/
> + sdmmc3_b4_pins_b: sdmmc3-b4-1 {
> + pins1 {
> + pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC3_D0 */
> + <STM32_PINMUX('D', 13, AF10)>, /* SDMMC3_D1 */
> + <STM32_PINMUX('B', 12, AF10)>, /* SDMMC3_D2 */
> + <STM32_PINMUX('D', 14, AF12)>, /* SDMMC3_D3 */
> + <STM32_PINMUX('D', 12, AF10)>; /* SDMMC3_CMD */
> + slew-rate = <0>;
> + drive-push-pull;
> + bias-pull-up;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('B', 13, AF10)>; /* SDMMC3_CK */
> + slew-rate = <1>;
> + drive-push-pull;
> + bias-pull-up;
> + };
> + };
> +
> + /omit-if-no-ref/
> + sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 {
> + pins1 {
> + pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC3_D0 */
> + <STM32_PINMUX('D', 13, AF10)>, /* SDMMC3_D1 */
> + <STM32_PINMUX('B', 12, AF10)>, /* SDMMC3_D2 */
> + <STM32_PINMUX('D', 14, AF10)>; /* SDMMC3_D3 */
> + slew-rate = <2>;
> + drive-push-pull;
> + bias-disable;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('B', 13, AF10)>; /* SDMMC3_CK */
> + slew-rate = <3>;
> + drive-push-pull;
> + bias-disable;
> + };
> + pins3 {
> + pinmux = <STM32_PINMUX('D', 12, AF10)>; /* SDMMC3_CMD */
> + slew-rate = <2>;
> + drive-open-drain;
> + bias-disable;
> + };
> + };
> +
> + /omit-if-no-ref/
> + sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 {
> + pins {
> + pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC3_D0 */
> + <STM32_PINMUX('D', 13, ANALOG)>, /* SDMMC3_D1 */
> + <STM32_PINMUX('B', 12, ANALOG)>, /* SDMMC3_D2 */
> + <STM32_PINMUX('D', 14, ANALOG)>, /* SDMMC3_D3 */
> + <STM32_PINMUX('B', 13, ANALOG)>, /* SDMMC3_CK */
> + <STM32_PINMUX('D', 12, ANALOG)>; /* SDMMC3_CMD */
> + };
> + };
> +
> + /omit-if-no-ref/
> + spi1_pins_a: spi1-0 {
> + pins1 {
> + pinmux = <STM32_PINMUX('G', 6, AF3)>, /* SPI1_SCK */
> + <STM32_PINMUX('H', 7, AF2)>; /* SPI1_MOSI */
> + drive-push-pull;
> + bias-disable;
> + slew-rate = <1>;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('H', 8, AF2)>; /* SPI1_MISO */
> + bias-disable;
> + };
> + };
> +
> + /omit-if-no-ref/
> + spi1_sleep_pins_a: spi1-sleep-0 {
> + pins1 {
> + pinmux = <STM32_PINMUX('G', 6, ANALOG)>, /* SPI1_SCK */
> + <STM32_PINMUX('H', 7, ANALOG)>, /* SPI1_MOSI */
> + <STM32_PINMUX('H', 8, ANALOG)>; /* SPI1_MISO */
> + };
> + };
> +
> /omit-if-no-ref/
> spi3_pins_a: spi3-0 {
> pins1 {
> @@ -471,6 +783,50 @@ pins {
> };
> };
>
> + /omit-if-no-ref/
> + usart1_pins_a: usart1-0 {
> + pins1 {
> + pinmux = <STM32_PINMUX('A', 3, AF6)>, /* USART1_TX */
> + <STM32_PINMUX('A', 1, AF5)>; /* USART1_RTS */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('A', 2, AF6)>, /* USART1_RX */
> + <STM32_PINMUX('A', 7, AF6)>; /* USART1_CTS_NSS */
> + bias-pull-up;
> + };
> + };
> +
> + /omit-if-no-ref/
> + usart1_idle_pins_a: usart1-idle-0 {
> + pins1 {
> + pinmux = <STM32_PINMUX('A', 3, ANALOG)>, /* USART1_TX */
> + <STM32_PINMUX('A', 7, ANALOG)>; /* USART1_CTS_NSS */
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('A', 1, AF5)>; /* USART1_RTS */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + pins3 {
> + pinmux = <STM32_PINMUX('A', 2, AF6)>; /* USART1_RX */
> + bias-pull-up;
> + };
> + };
> +
> + /omit-if-no-ref/
> + usart1_sleep_pins_a: usart1-sleep-0 {
> + pins {
> + pinmux = <STM32_PINMUX('A', 3, ANALOG)>, /* USART1_TX */
> + <STM32_PINMUX('A', 1, ANALOG)>, /* USART1_RTS */
> + <STM32_PINMUX('A', 7, ANALOG)>, /* USART1_CTS_NSS */
> + <STM32_PINMUX('A', 2, ANALOG)>; /* USART1_RX */
> + };
> + };
> +
> /omit-if-no-ref/
> usart2_pins_a: usart2-0 {
> pins1 {
> @@ -504,6 +860,50 @@ pins {
> };
> };
>
> + /omit-if-no-ref/
> + usart2_pins_b: usart2-1 {
> + pins1 {
> + pinmux = <STM32_PINMUX('A', 4, AF6)>, /* USART2_TX */
> + <STM32_PINMUX('A', 5, AF6)>; /* USART2_RTS */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('A', 8, AF8)>, /* USART2_RX */
> + <STM32_PINMUX('A', 9, AF6)>; /* USART2_CTS_NSS */
> + bias-disable;
> + };
> + };
> +
> + /omit-if-no-ref/
> + usart2_idle_pins_b: usart2-idle-1 {
> + pins1 {
> + pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* USART2_TX */
> + <STM32_PINMUX('A', 9, ANALOG)>; /* USART2_CTS_NSS */
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('A', 5, AF6)>; /* USART2_RTS */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + pins3 {
> + pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
> + bias-pull-up;
> + };
> + };
> +
> + /omit-if-no-ref/
> + usart2_sleep_pins_b: usart2-sleep-1 {
> + pins {
> + pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* USART2_TX */
> + <STM32_PINMUX('A', 5, ANALOG)>, /* USART2_RTS */
> + <STM32_PINMUX('A', 9, ANALOG)>, /* USART2_CTS_NSS */
> + <STM32_PINMUX('A', 8, ANALOG)>; /* USART2_RX */
> + };
> + };
> +
> /omit-if-no-ref/
> usart6_pins_a: usart6-0 {
> pins1 {
> @@ -547,6 +947,127 @@ pins {
> <STM32_PINMUX('F', 14, ANALOG)>; /* USART6_RX */
> };
> };
> +
> + /omit-if-no-ref/
> + usart6_pins_b: usart6-1 {
> + pins1 {
> + pinmux = <STM32_PINMUX('F', 5, AF6)>; /* USART6_TX */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('F', 4, AF6)>; /* USART6_RX */
> + bias-disable;
> + };
> + };
> +
> + /omit-if-no-ref/
> + usart6_idle_pins_b: usart6-idle-1 {
> + pins1 {
> + pinmux = <STM32_PINMUX('F', 5, ANALOG)>; /* USART6_TX */
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('F', 4, AF6)>; /* USART6_RX */
> + bias-disable;
> + };
> + };
> +
> + /omit-if-no-ref/
> + usart6_sleep_pins_b: usart6-sleep-1 {
> + pins {
> + pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART6_TX */
> + <STM32_PINMUX('F', 4, ANALOG)>; /* USART6_RX */
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart8_pins_a: uart8-0 {
> + pins1 {
> + pinmux = <STM32_PINMUX('I', 11, AF5)>, /* UART8_TX */
> + <STM32_PINMUX('B', 15, AF3)>; /* UART8_RTS */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('F', 11, AF6)>, /* UART8_RX */
> + <STM32_PINMUX('H', 5, AF6)>; /* UART8_CTS_NSS */
> + bias-pull-up;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart8_idle_pins_a: uart8-idle-0 {
> + pins1 {
> + pinmux = <STM32_PINMUX('I', 11, ANALOG)>, /* UART8_TX */
> + <STM32_PINMUX('H', 5, ANALOG)>; /* UART8_CTS_NSS */
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('B', 15, AF3)>; /* UART8_RTS */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + pins3 {
> + pinmux = <STM32_PINMUX('F', 11, AF6)>; /* UART8_RX */
> + bias-pull-up;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart8_sleep_pins_a: uart8-sleep-0 {
> + pins {
> + pinmux = <STM32_PINMUX('I', 11, ANALOG)>, /* UART8_TX */
> + <STM32_PINMUX('B', 15, ANALOG)>, /* UART8_RTS */
> + <STM32_PINMUX('H', 5, ANALOG)>, /* UART8_CTS_NSS */
> + <STM32_PINMUX('F', 11, ANALOG)>; /* UART8_RX */
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart9_pins_a: uart9-0 {
> + pins1 {
> + pinmux = <STM32_PINMUX('G', 8, AF6)>, /* UART9_TX */
> + <STM32_PINMUX('F', 12, AF6)>; /* UART9_RTS */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('I', 5, AF6)>, /* UART9_RX */
> + <STM32_PINMUX('G', 7, AF6)>; /* UART9_CTS_NSS */
> + bias-pull-up;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart9_idle_pins_a: uart9-idle-0 {
> + pins1 {
> + pinmux = <STM32_PINMUX('G', 8, ANALOG)>, /* UART9_TX */
> + <STM32_PINMUX('G', 7, ANALOG)>; /* UART9_CTS_NSS */
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('F', 12, AF6)>; /* UART9_RTS */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + pins3 {
> + pinmux = <STM32_PINMUX('I', 5, AF6)>; /* UART9_RX */
> + bias-pull-up;
> + };
> + };
> +
> + /omit-if-no-ref/
> + uart9_sleep_pins_a: uart9-sleep-0 {
> + pins {
> + pinmux = <STM32_PINMUX('G', 8, ANALOG)>, /* UART9_TX */
> + <STM32_PINMUX('F', 12, ANALOG)>, /* UART9_RTS */
> + <STM32_PINMUX('G', 7, ANALOG)>, /* UART9_CTS_NSS */
> + <STM32_PINMUX('I', 5, ANALOG)>; /* UART9_RX */
> + };
> + };
> };
>
> &pinctrl_z {
> @@ -569,6 +1090,25 @@ pins {
> };
> };
>
> + /omit-if-no-ref/
> + i2c8_pins_b: i2c8-1 {
> + pins {
> + pinmux = <STM32_PINMUX('Z', 4, AF8)>, /* I2C1_SCL */
> + <STM32_PINMUX('Z', 9, AF8)>; /* I2C1_SDA */
> + bias-disable;
> + drive-open-drain;
> + slew-rate = <0>;
> + };
> + };
> +
> + /omit-if-no-ref/
> + i2c8_sleep_pins_b: i2c8-sleep-1 {
> + pins {
> + pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C1_SCL */
> + <STM32_PINMUX('Z', 9, ANALOG)>; /* I2C1_SDA */
> + };
> + };
> +
> /omit-if-no-ref/
> spi8_pins_a: spi8-0 {
> pins1 {
> @@ -592,4 +1132,28 @@ pins1 {
> <STM32_PINMUX('Z', 1, ANALOG)>; /* SPI8_MISO */
> };
> };
> +
> + /omit-if-no-ref/
> + spi8_pins_b: spi8-1 {
> + pins1 {
> + pinmux = <STM32_PINMUX('Z', 5, AF3)>, /* SPI8_SCK */
> + <STM32_PINMUX('Z', 7, AF3)>; /* SPI8_MOSI */
> + drive-push-pull;
> + bias-disable;
> + slew-rate = <1>;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('Z', 8, AF3)>; /* SPI8_MISO */
> + bias-disable;
> + };
> + };
> +
> + /omit-if-no-ref/
> + spi8_sleep_pins_b: spi8-sleep-1 {
> + pins1 {
> + pinmux = <STM32_PINMUX('Z', 5, ANALOG)>, /* SPI8_SCK */
> + <STM32_PINMUX('Z', 7, ANALOG)>, /* SPI8_MOSI */
> + <STM32_PINMUX('Z', 8, ANALOG)>; /* SPI8_MISO */
> + };
> + };
> };
next prev parent reply other threads:[~2026-09-28 9:02 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-11 20:59 [PATCH 00/10] arm64: dts: st: Add support for DH electronics STM32MP23xx/STM32MP25xx DHCOS SoM and Breakout Board and DHSBC Marek Vasut
2026-07-11 20:59 ` [PATCH 01/10] dt-bindings: arm: stm32: Document " Marek Vasut
2026-07-13 7:48 ` Krzysztof Kozlowski
2026-07-13 10:31 ` Marek Vasut
2026-07-11 20:59 ` [PATCH 02/10] dt-bindings: gpio: pca95xx: Document Kinetic KTS1622 Marek Vasut
2026-07-13 7:49 ` Krzysztof Kozlowski
2026-07-13 8:36 ` Bartosz Golaszewski
2026-07-13 10:33 ` Marek Vasut
2026-07-15 8:18 ` Bartosz Golaszewski
2026-07-11 20:59 ` [PATCH 03/10] arm64: dts: st: Fix SDMMC1 indent on stm32mp231 Marek Vasut
2026-07-11 20:59 ` [PATCH 04/10] arm64: dts: st: Fix SDMMC1 indent on stm32mp251 Marek Vasut
2026-07-11 20:59 ` [PATCH 05/10] arm64: dts: st: Add SDMMC2 and SDMMC3 nodes on stm32mp231 Marek Vasut
2026-07-11 20:59 ` [PATCH 06/10] arm64: dts: st: Add SDMMC2 and SDMMC3 nodes on stm32mp251 Marek Vasut
2026-09-28 9:04 ` Alexandre TORGUE
2026-07-11 20:59 ` [PATCH 07/10] arm64: dts: st: Add OMM node on stm32mp231 Marek Vasut
2026-07-11 20:59 ` [PATCH 08/10] arm64: dts: st: Add pinmux nodes for DH electronics STM32MP23xx/STM32MP25xx DHCOS SoM and Breakout Board Marek Vasut
2026-09-28 9:02 ` Alexandre TORGUE [this message]
2026-09-28 14:12 ` Marek Vasut
2026-07-11 20:59 ` [PATCH 09/10] arm64: dts: st: Add support for DH electronics STM32MP23xx/STM32MP25xx DHCOS SoM and Breakout Board and DHSBC Marek Vasut
2026-07-11 20:59 ` [PATCH 10/10] MAINTAINERS: Add DH electronics DHCOS SoM entry and fix email address Marek Vasut
2026-07-13 7:51 ` Krzysztof Kozlowski
2026-07-13 13:25 ` Marek Vasut
2026-07-13 13:45 ` Krzysztof Kozlowski
2026-08-25 17:56 ` [PATCH 00/10] arm64: dts: st: Add support for DH electronics STM32MP23xx/STM32MP25xx DHCOS SoM and Breakout Board and DHSBC Marek Vasut
2026-09-08 19:43 ` Marek Vasut
2026-09-28 12:30 ` Alexandre TORGUE
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