From: Nicolas Ferre <nicolas.ferre@microchip.com>
To: Claudiu Beznea <claudiu.beznea@microchip.com>,
<alexandre.belloni@bootlin.com>,
<ludovic.desroches@microchip.com>, <robh+dt@kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] ARM: dts: at91: sama7g5: add chipid
Date: Tue, 14 Sep 2021 17:07:22 +0200 [thread overview]
Message-ID: <50422bf9-01d5-3d11-ada1-f2f7ee155aba@microchip.com> (raw)
In-Reply-To: <20210908094329.182477-1-claudiu.beznea@microchip.com>
On 08/09/2021 at 11:43, Claudiu Beznea wrote:
> Add chipid node for sama7g5.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> ---
>
> Hi Nicolas,
>
> This applies clean on top of series with title "ARM: at91: add new nodes
> to DT and fix for PM".
I think it can go in at91-fixes for 5.15 as it integrates nicely with
the basic IP that we need enabled on this new SoC.
Best regards,
Nicolas
>
> arch/arm/boot/dts/sama7g5.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
> index e50806cf7660..6c58c151c6d9 100644
> --- a/arch/arm/boot/dts/sama7g5.dtsi
> +++ b/arch/arm/boot/dts/sama7g5.dtsi
> @@ -159,6 +159,11 @@ ps_wdt: watchdog@e001d180 {
> clocks = <&clk32k 0>;
> };
>
> + chipid@e0020000 {
> + compatible = "microchip,sama7g5-chipid";
> + reg = <0xe0020000 0x8>;
> + };
> +
> sdmmc0: mmc@e1204000 {
> compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
> reg = <0xe1204000 0x4000>;
>
--
Nicolas Ferre
prev parent reply other threads:[~2021-09-14 15:07 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-08 9:43 Claudiu Beznea
2021-09-14 15:07 ` Nicolas Ferre [this message]
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