From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752158AbdFOKbF (ORCPT ); Thu, 15 Jun 2017 06:31:05 -0400 Received: from foss.arm.com ([217.140.101.70]:43868 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751667AbdFOKbE (ORCPT ); Thu, 15 Jun 2017 06:31:04 -0400 Subject: Re: [PATCH 11/12] coresight tmc: Add support for Coresight SoC 600 TMC To: Mathieu Poirier References: <1497278211-5001-1-git-send-email-suzuki.poulose@arm.com> <1497278211-5001-12-git-send-email-suzuki.poulose@arm.com> <20170614182520.GF22030@xps15> Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org From: Suzuki K Poulose Message-ID: <5066f809-7c3e-fe68-0db1-3d26b937e059@arm.com> Date: Thu, 15 Jun 2017 11:31:02 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <20170614182520.GF22030@xps15> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 14/06/17 19:25, Mathieu Poirier wrote: > On Mon, Jun 12, 2017 at 03:36:50PM +0100, Suzuki K Poulose wrote: >> The coresight SoC 600 supports ETR save-restore and also supports >> a new mode, SWFIFO2, which helps to streaming the trace data through >> a functional I/O (e.g, USB). >> >> Also, TMCs have different PIDs in different configurations (ETF, >> ETB & ETR), unlike the previous generation. >> >> Cc: Mathieu Poirier >> Signed-off-by: Suzuki K Poulose ... >> diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h >> index d5ef51e..8c74e1e 100644 >> --- a/drivers/hwtracing/coresight/coresight-tmc.h >> +++ b/drivers/hwtracing/coresight/coresight-tmc.h >> @@ -98,6 +98,12 @@ enum tmc_mem_intf_width { >> * value. >> */ >> #define TMC_CAP_ETR_SAVE_RESTORE (1U << 1) >> +/* >> + * TMC_CAP_ETR_SWFIFO2_MODE - ETR supports a new mode, SWFIFO2, which >> + * allows streaming the trace data with optionally raising an interrupt >> + * when the buffer fill level reaches a programmed watermark. >> + */ >> +#define TMC_CAP_ETR_SWFIFO2_MODE (1U << 2) >> >> /** >> * struct tmc_cap - Describes the capabilities of the TMC. >> @@ -108,6 +114,8 @@ struct tmc_caps { >> }; >> >> #define CORESIGHT_SOC_400_TMC_CAPS (TMC_CAP_ETR_SG_UNIT) >> +#define CORESIGHT_SOC_600_ETR_CAPS (TMC_CAP_ETR_SAVE_RESTORE | \ >> + TMC_CAP_ETR_SWFIFO2_MODE) > > TMC_CAP_ETR_SWFIFO2_MODE isn't used anywhere - please remove. It can be added > when code that uses the feature is introduced. Sure, will do. Suzuki