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To: visitorckw@gmail.com,corbet@lwn.net,skhan@linuxfoundation.org,geert@linux-m68k.org,ast@kernel.org,daniel@iogearbox.net,eddyz87@gmail.com,memxor@gmail.com,andrii@kernel.org,gerg@linux-m68k.org
Cc: rdunlap@infradead.org,martin.lau@linux.dev,song@kernel.org,yonghong.song@linux.dev,jolsa@kernel.org,emil@etsalapatis.com,ihor.solodrai@linux.dev,jserv@ccns.ncku.edu.tw,marscheng@google.com,eleanor15x@gmail.com,linux-doc@vger.kernel.org,linux-kernel@vger.kernel.org,linux-m68k@lists.linux-m68k.org,bpf@vger.kernel.org,visitorckw@gmail.com,daniel@thingy.jp,ast@kernel.org,andrii@kernel.org,daniel@iogearbox.net,martin.lau@kernel.org,eddyz87@gmail.com,yonghong.song@linux.dev,mason@kernel.org,ihor.solodrai@linux.dev
Subject: Re: [PATCH v7] m68k, bpf: Add initial BPF JIT compiler support
Date: Mon, 5 Oct 2026 19:48:15 +0000 (UTC) [thread overview]
Message-ID: <506b804c97aaa3a66660bb0eebd85c6041e241532c1227f1012166785d240fae@mail.kernel.org> (raw)
In-Reply-To: <20261005185251.2422114-1-visitorckw@gmail.com>
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> m68k, bpf: Add initial BPF JIT compiler support
TL;DR: Nit only, not a bug: the ColdFire byte-swap instruction sequences are
open-coded repeatedly in emit_to_le16/32/64() in the m68k JIT; suggests small
shared helpers, as arm's bpf_jit_32.c does.
> diff --git a/arch/m68k/net/bpf_jit_comp.c b/arch/m68k/net/bpf_jit_comp.c
> new file mode 100644
> index 000000000000..6c40d358acd4
> --- /dev/null
> +++ b/arch/m68k/net/bpf_jit_comp.c
> @@ -0,0 +1,1840 @@
[ ... ]
> +static inline void emit_to_le16(struct jit_ctx *ctx, s8 d_lo, s8 d_hi)
> +{
> + if (CPU_IS_COLDFIRE) {
> + emit_16(ctx, 0x71c0 | (d_lo << 9) | d_lo); /* mvz.w d_lo, d_lo */
> + emit_16(ctx, 0x7180 | (d_hi << 9) | d_lo); /* mvz.b d_lo, d_hi */
> + emit_16(ctx, 0xe088 | d_lo); /* lsr.l #8, d_lo */
> + emit_16(ctx, 0xe188 | d_hi); /* lsl.l #8, d_hi */
> + emit_16(ctx, 0x8080 | (d_lo << 9) | d_hi); /* or.l d_hi, d_lo */
[ ... ]
> +static inline void emit_to_le32(struct jit_ctx *ctx, s8 d_lo, s8 d_hi)
> +{
> + if (CPU_IS_COLDFIRE) {
> + emit_16(ctx, 0x2f00 | d_lo); /* move.l d_lo, -(%sp) */
> + emit_16(ctx, 0x4840 | d_lo); /* swap d_lo */
> + emit_16(ctx, 0x71c0 | (d_lo << 9) | d_lo); /* mvz.w d_lo, d_lo */
> + emit_16(ctx, 0x7180 | (d_hi << 9) | d_lo); /* mvz.b d_lo, d_hi */
> + emit_16(ctx, 0xe088 | d_lo); /* lsr.l #8, d_lo */
> + emit_16(ctx, 0xe188 | d_hi); /* lsl.l #8, d_hi */
> + emit_16(ctx, 0x8080 | (d_hi << 9) | d_lo); /* or.l d_lo, d_hi */
> + emit_16(ctx, 0x2017 | (d_lo << 9)); /* move.l (%sp), d_lo */
> + emit_16(ctx, 0x2e80 | d_hi); /* move.l d_hi, (%sp) */
> + emit_16(ctx, 0x71c0 | (d_lo << 9) | d_lo); /* mvz.w d_lo, d_lo */
> + emit_16(ctx, 0x7180 | (d_hi << 9) | d_lo); /* mvz.b d_lo, d_hi */
> + emit_16(ctx, 0xe088 | d_lo); /* lsr.l #8, d_lo */
> + emit_16(ctx, 0xe188 | d_hi); /* lsl.l #8, d_hi */
> + emit_16(ctx, 0x8080 | (d_lo << 9) | d_hi); /* or.l d_hi, d_lo */
> + emit_16(ctx, 0x4840 | d_lo); /* swap d_lo */
> + emit_16(ctx, 0x809f | (d_lo << 9)); /* or.l (%sp)+, d_lo */
[ ... ]
> +static inline void emit_to_le64(struct jit_ctx *ctx, s8 d_lo, s8 d_hi)
> +{
> + if (CPU_IS_COLDFIRE) {
> + emit_16(ctx, 0x2f00 | d_lo); /* move.l d_lo, -(%sp) */
> + emit_16(ctx, 0x2f00 | d_hi); /* move.l d_hi, -(%sp) */
> +
> + emit_16(ctx, 0x4840 | d_lo); /* swap d_lo */
> + emit_16(ctx, 0x71c0 | (d_lo << 9) | d_lo); /* mvz.w d_lo, d_lo */
> + emit_16(ctx, 0x7180 | (d_hi << 9) | d_lo); /* mvz.b d_lo, d_hi */
> + emit_16(ctx, 0xe088 | d_lo); /* lsr.l #8, d_lo */
> + emit_16(ctx, 0xe188 | d_hi); /* lsl.l #8, d_hi */
> + emit_16(ctx, 0x8080 | (d_hi << 9) | d_lo); /* or.l d_lo, d_hi */
> + emit_16(ctx, 0x202f | (d_lo << 9)); /* move.l 4(%sp), d_lo */
> + emit_16(ctx, 0x0004);
> + emit_16(ctx, 0x2f40 | d_hi); /* move.l d_hi, 4(%sp) */
> + emit_16(ctx, 0x0004);
> + emit_16(ctx, 0x71c0 | (d_lo << 9) | d_lo); /* mvz.w d_lo, d_lo */
> + emit_16(ctx, 0x7180 | (d_hi << 9) | d_lo); /* mvz.b d_lo, d_hi */
> + emit_16(ctx, 0xe088 | d_lo); /* lsr.l #8, d_lo */
[ ... ]
This isn't a bug, but the ColdFire byte-swap sequence (mvz.w / mvz.b /
lsr.l #8 / lsl.l #8 / or.l) is open-coded once in emit_to_le16(), twice in
emit_to_le32() and four times in emit_to_le64(), differing only in which
register receives the result. The ror.w #8 / swap / ror.w #8 sequence is
likewise repeated in emit_to_le32() and twice in emit_to_le64().
Could these go into small helpers, similar to emit_rev16() and emit_rev32()
in arch/arm/net/bpf_jit_32.c, so that emit_to_le32() and emit_to_le64()
reuse them instead of repeating the instructions?
---
AI reviewed your patch. Please fix the bug or email reply why it's not a bug.
See: https://github.com/kernel-patches/vmtest/blob/master/ci/claude/README.md
CI run summary: https://github.com/kernel-patches/bpf/actions/runs/37360793550
prev parent reply other threads:[~2026-10-05 19:48 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-05 18:52 Kuan-Wei Chiu
2026-10-05 19:48 ` bot+bpf-ci [this message]
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