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Sat, 06 Sep 2025 11:51:16 -0700 (PDT) Message-ID: <506c3f57-d71a-426e-882e-ba3395c7b1b9@tuxon.dev> Date: Sat, 6 Sep 2025 21:51:14 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: claudiu beznea Subject: Re: [PATCH v3 25/32] clk: at91: sama5d4: switch to parent_hw and parent_data To: Ryan.Wanner@microchip.com, mturquette@baylibre.com, sboyd@kernel.org, nicolas.ferre@microchip.com, alexandre.belloni@bootlin.com Cc: varshini.rajendran@microchip.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, robh@kernel.org References: <1b8f27323cb403ffcf6be7fac2def43c4a31bea9.1752176711.git.Ryan.Wanner@microchip.com> Content-Language: en-US In-Reply-To: <1b8f27323cb403ffcf6be7fac2def43c4a31bea9.1752176711.git.Ryan.Wanner@microchip.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 7/10/25 23:07, Ryan.Wanner@microchip.com wrote: > From: Claudiu Beznea > > Switch SAMA5D4 clocks to use parent_hw and parent_data. Having > parent_hw instead of parent names improves to clock registration > speed and re-parenting. > > Signed-off-by: Claudiu Beznea > Signed-off-by: Ryan Wanner > --- > drivers/clk/at91/sama5d4.c | 129 +++++++++++++++++++------------------ > 1 file changed, 66 insertions(+), 63 deletions(-) > > diff --git a/drivers/clk/at91/sama5d4.c b/drivers/clk/at91/sama5d4.c > index 1ff9286148da..a06fea1a7a02 100644 > --- a/drivers/clk/at91/sama5d4.c > +++ b/drivers/clk/at91/sama5d4.c > @@ -36,9 +36,9 @@ static const struct clk_pcr_layout sama5d4_pcr_layout = { > .pid_mask = GENMASK(6, 0), > }; > > -static const struct { > +static struct { > char *n; > - char *p; > + struct clk_hw *parent_hw; > unsigned long flags; > u8 id; > } sama5d4_systemck[] = { > @@ -46,14 +46,14 @@ static const struct { > * ddrck feeds DDR controller and is enabled by bootloader thus we need > * to keep it enabled in case there is no Linux consumer for it. > */ > - { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL }, > - { .n = "lcdck", .p = "masterck_div", .id = 3 }, > - { .n = "smdck", .p = "smdclk", .id = 4 }, > - { .n = "uhpck", .p = "usbck", .id = 6 }, > - { .n = "udpck", .p = "usbck", .id = 7 }, > - { .n = "pck0", .p = "prog0", .id = 8 }, > - { .n = "pck1", .p = "prog1", .id = 9 }, > - { .n = "pck2", .p = "prog2", .id = 10 }, > + { .n = "ddrck", .id = 2, .flags = CLK_IS_CRITICAL }, > + { .n = "lcdck", .id = 3 }, > + { .n = "smdck", .id = 4 }, > + { .n = "uhpck", .id = 6 }, > + { .n = "udpck", .id = 7 }, > + { .n = "pck0", .id = 8 }, > + { .n = "pck1", .id = 9 }, > + { .n = "pck2", .id = 10 }, > }; > > static const struct { > @@ -128,25 +128,16 @@ static const struct { > > static void __init sama5d4_pmc_setup(struct device_node *np) > { > + const char *slow_clk_name = "slowck", *main_xtal_name = "main_xtal"; > + struct clk_hw *main_rc_hw, *main_osc_hw, *mainck_hw; > + u8 slow_clk_index = 0, main_xtal_index = 1; > + struct clk_hw *smdck_hw, *usbck_hw, *hw; > struct clk_range range = CLK_RANGE(0, 0); > - const char *slck_name, *mainxtal_name; > + struct clk_parent_data parent_data[5]; > struct pmc_data *sama5d4_pmc; > - const char *parent_names[5]; > struct regmap *regmap; > - struct clk_hw *hw; > - int i; > bool bypass; > - > - i = of_property_match_string(np, "clock-names", "slow_clk"); > - if (i < 0) > - return; > - > - slck_name = of_clk_get_parent_name(np, i); > - > - i = of_property_match_string(np, "clock-names", "main_xtal"); > - if (i < 0) > - return; > - mainxtal_name = of_clk_get_parent_name(np, i); Same here