From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C0421317714; Fri, 15 Aug 2025 18:49:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=156.67.10.101 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755283781; cv=none; b=po6UrKqU+YJJz3Z0jatRqL/2uC6WRnxYE2Lmt5au9ukfkS4ljCMPECIlzz0o8COYWBAfpfrDUuYF/6ID+Qs8ddBM9m4VCgnQIRNjqVafL/8y+v7GmCpi8scIhq68LDDhVe2jJlH/YKW2zXH5V69Jfhes0zKOrLACwScgYjzGKw0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755283781; c=relaxed/simple; bh=b/i+po+8/sV24lvo2g/QG1HgwE9bX25ATZUwg6dBnpM=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=N3r7zVs01oXy459n9gulZmMfGj0+92rfekdy8O7rUhIy002+Fxy983UHb9j416BHavtYWyuw83JRpmswtJcomcPpB4PAq1McNtDQ3xKJco6Dt0hBKn2inWckh40yHjTKHSPWha0RhLhVJg2ihJNfomyQVDkUPk2xUyw49MZOsS4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch; spf=pass smtp.mailfrom=lunn.ch; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b=ykjmhjZF; arc=none smtp.client-ip=156.67.10.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lunn.ch Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="ykjmhjZF" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=1PlEMtUUWsb2dchVb0gw1B5xKWMiUdAV11zCeHtQwZ0=; b=ykjmhjZFazc8fArusi/DDEiVqK /BBu7eARMFrwumSTf43pgb5XkErvzEYhpzACpjeSbPxNyxUYQAyAor+rWNBfgQLiHsNlfUFOaNzgp rHdZV7KxNwZkHBTRk1BhMg3i2Hh4CNY0f7PEMK2USMwiSOD5wrGzxANwlkc+UXZImBTM=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1umzUd-004qzR-85; Fri, 15 Aug 2025 20:49:35 +0200 Date: Fri, 15 Aug 2025 20:49:35 +0200 From: Andrew Lunn To: Stanimir Varbanov Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rpi-kernel@lists.infradead.org, Broadcom internal kernel review list , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Andrea della Porta , Nicolas Ferre , Claudiu Beznea , Phil Elwell , Jonathan Bell , Dave Stevenson Subject: Re: [PATCH 1/5] net: cadence: macb: Set upper 32bits of DMA ring buffer Message-ID: <507730df-a882-4d75-af8a-a0c0b1124b78@lunn.ch> References: <20250815135911.1383385-1-svarbanov@suse.de> <20250815135911.1383385-2-svarbanov@suse.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250815135911.1383385-2-svarbanov@suse.de> On Fri, Aug 15, 2025 at 04:59:07PM +0300, Stanimir Varbanov wrote: > In case of rx queue reset and 64bit capable hardware, set the upper > 32bits of DMA ring buffer address. > > Signed-off-by: Stanimir Varbanov Reviewed-by: Andrew Lunn Andrew