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([2a0d:3344:1b73:a910::f71]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37ee0b94071sm10764981f8f.89.2024.10.24.01.26.02 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 24 Oct 2024 01:26:03 -0700 (PDT) Message-ID: <50874428-b4ef-4e65-b60b-1bd917f1933c@redhat.com> Date: Thu, 24 Oct 2024 10:26:01 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V2 net 1/9] net: hns3: default enable tx bounce buffer when smmu enabled To: Jijie Shao , davem@davemloft.net, edumazet@google.com, kuba@kernel.org, shenjian15@huawei.com, salil.mehta@huawei.com Cc: liuyonglong@huawei.com, wangpeiyang1@huawei.com, lanhao@huawei.com, chenhao418@huawei.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org References: <20241018101059.1718375-1-shaojijie@huawei.com> <20241018101059.1718375-2-shaojijie@huawei.com> Content-Language: en-US From: Paolo Abeni In-Reply-To: <20241018101059.1718375-2-shaojijie@huawei.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 10/18/24 12:10, Jijie Shao wrote: > From: Peiyang Wang > > The SMMU engine on HIP09 chip has a hardware issue. > SMMU pagetable prefetch features may prefetch and use a invalid PTE > even the PTE is valid at that time. This will cause the device trigger > fake pagefaults. The solution is to avoid prefetching by adding a > SYNC command when smmu mapping a iova. But the performance of nic has a > sharp drop. Then we do this workaround, always enable tx bounce buffer, > avoid mapping/unmapping on TX path. > > This issue only affects HNS3, so we always enable > tx bounce buffer when smmu enabled to improve performance. > > Signed-off-by: Peiyang Wang > Signed-off-by: Jian Shen > Signed-off-by: Jijie Shao I'm sorry to nick pick on somewhat small details, but we really need a fixes tag here to make 110% clear is a bugfix. I guess it could be the commit introducing the support for the buggy H/W. Thanks, Paolo