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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id q8-20020a2eb4a8000000b002934fe524d2sm958159ljm.83.2023.02.22.14.22.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 22 Feb 2023 14:22:22 -0800 (PST) Message-ID: <509a813c-1bc3-8ff9-de2c-26ffe0b92a8a@linaro.org> Date: Thu, 23 Feb 2023 00:22:21 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.2 Subject: Re: [PATCH 5/5] drm/msm/a5xx: Enable optional icc voting from OPP tables Content-Language: en-GB To: Konrad Dybcio , Rob Clark , Abhinav Kumar , Sean Paul , David Airlie , Daniel Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org References: <20230222-konrad-longbois-next-v1-0-01021425781b@linaro.org> <20230222-konrad-longbois-next-v1-5-01021425781b@linaro.org> <4b9145e0-0526-dd08-2d92-05a49e50e3bc@linaro.org> <34cd34f8-86b1-0b8f-6812-fe613e9ffa82@linaro.org> From: Dmitry Baryshkov In-Reply-To: <34cd34f8-86b1-0b8f-6812-fe613e9ffa82@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 23/02/2023 00:14, Konrad Dybcio wrote: > > > On 22.02.2023 23:12, Dmitry Baryshkov wrote: >> On 22/02/2023 23:47, Konrad Dybcio wrote: >>> Add the dev_pm_opp_of_find_icc_paths() call to let the OPP framework >>> handle bus voting as part of power level setting. >> >> This can probably go to the generic code path rather than sticking it into a5xx only. > The reasoning is explained in the cover letter, a3xx/a4xx already > have "raw" icc set calls which would require more work (and above > all, testing) to untangle while keeping backwards compat, this is > a midterm solution that would allow getting scaling to work earlier. Those two platforms call icc_set_bw() during setup, however their opp tables do not contain BW settings, making dev_pm_opp_of_find_icc_paths() nop. So, I think, we might as well call this function on a3xx/a4xx, making the code future proof. > > Konrad >> >>> >>> Signed-off-by: Konrad Dybcio >>> --- >>>   drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 4 ++++ >>>   1 file changed, 4 insertions(+) >>> >>> diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c >>> index d09221f97f71..a33af0cc27b6 100644 >>> --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c >>> +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c >>> @@ -1775,5 +1775,9 @@ struct msm_gpu *a5xx_gpu_init(struct drm_device *dev) >>>       /* Set up the preemption specific bits and pieces for each ringbuffer */ >>>       a5xx_preempt_init(gpu); >>>   +    ret = dev_pm_opp_of_find_icc_paths(&pdev->dev, NULL); >>> +    if (ret) >>> +        return ERR_PTR(ret); >>> + >>>       return gpu; >>>   } >>> >> -- With best wishes Dmitry