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McKenney" Cc: linux-kernel@vger.kernel.org, Frederic Weisbecker , Neeraj Upadhyay , Joel Fernandes , Josh Triplett , Boqun Feng , Uladzislau Rezki , Steven Rostedt , Lai Jiangshan , Zqiang , Davidlohr Bueso , Kunwu Chan , Puranjay Mohan , rcu@vger.kernel.org Date: Wed, 11 Nov 2026 11:02:33 -0800 In-Reply-To: <20261111145949.70845-1-mathieu.desnoyers@efficios.com> References: <20261111145949.70845-1-mathieu.desnoyers@efficios.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-EI6StJ/oQk+lTFoKSbAh" User-Agent: Evolution 3.62.0-0ubuntu1~ppa1~24.04 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html --=-EI6StJ/oQk+lTFoKSbAh Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, 2026-11-11 at 09:59 -0500, Mathieu Desnoyers wrote: >=20 > On architectures without NMI-safe this_cpu_inc(), every atomic reader > now pays an atomic increment at lock and at unlock.=C2=A0 The update side= is > unchanged.=C2=A0 On architectures with NMI-safe this_cpu_inc(), such as x= 86, > the readers use the same counter increments as before.=C2=A0=C2=A0 The latter claim is only true in __srcu_read_lock_fast()/_fast_updown() isn't it? Not in the atomic-SRCU. Unless we do something like this on top? Signed-off-by: David Woodhouse in case it actually makes sense and you use it as anything other than a hint. diff --git a/include/linux/srcu.h b/include/linux/srcu.h index b6e6171b4cd4..a6db7bf55cde 100644 --- a/include/linux/srcu.h +++ b/include/linux/srcu.h @@ -342,7 +342,18 @@ static inline int __srcu_read_lock_atomic(struct srcu_= struct *ssp) if (in_task()) non_block_start(); srcu_check_read_flavor(ssp, SRCU_READ_FLAVOR_ATOMIC); - retval =3D __srcu_read_lock_nmisafe(ssp); + /* + * Where this_cpu_inc() is NMI-safe, the this_cpu_inc() + smp_mb() + * of __srcu_read_lock() is NMI-safe too, and is exactly what this + * flavor's readers always paid. Only the architectures which + * genuinely need the atomic increments take them; the pairing + * with synchronize_srcu_atomic()'s counter scan is unchanged + * either way (full barrier after the increment in both forms). + */ + if (!IS_ENABLED(CONFIG_NEED_SRCU_NMI_SAFE)) + retval =3D __srcu_read_lock(ssp); + else + retval =3D __srcu_read_lock_nmisafe(ssp); /* * An NMI may interrupt lockdep itself. Annotate it as a trylock * there, as srcu_read_lock_nmisafe() does. @@ -600,7 +611,10 @@ static inline void __srcu_read_unlock_atomic(struct sr= cu_struct *ssp, int idx) WARN_ON_ONCE(idx & ~0x1); srcu_check_read_flavor(ssp, SRCU_READ_FLAVOR_ATOMIC); srcu_lock_release(&ssp->dep_map); - __srcu_read_unlock_nmisafe(ssp, idx); + if (!IS_ENABLED(CONFIG_NEED_SRCU_NMI_SAFE)) + __srcu_read_unlock(ssp, idx); + else + __srcu_read_unlock_nmisafe(ssp, idx); if (in_task()) non_block_end(); } > David agreed to > the change, as long as synchronize_srcu_atomic() stays within the 4-16us > it was designed for [3]. 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