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From: Stephen Warren <swarren@wwwdotorg.org>
To: Laxman Dewangan <ldewangan@nvidia.com>
Cc: swarren@nvidia.com, mturquette@linaro.org, pgaikwad@nvidia.com,
	linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org
Subject: Re: [PATCH] clk: tegra: initialise parent of uart clocks
Date: Wed, 06 Feb 2013 10:43:41 -0700	[thread overview]
Message-ID: <5112964D.50707@wwwdotorg.org> (raw)
In-Reply-To: <1360147661-5435-1-git-send-email-ldewangan@nvidia.com>

On 02/06/2013 03:47 AM, Laxman Dewangan wrote:
> Initialise the parent of UARTs to PLLP

OK

> and disabling clock by default.

Hmm. Only the clocks initialized by the new entries you added are marked
disabled (or rather, not actively enabled; if they're enabled already,
they won't be disabled). We should treat all UARTs equally. Historically
we've needed to enable the serial clocks forcibly since the regular
serial driver didn't call clk_get() or clk_prepare_enable() on any
clocks, but I notice that it does now, since sometime in kernel 3.8. As
such, I think you can modify all the UART entries in these tables to
have the enable/state field set to false (0). Can you try that and check
that it works for the serial console ports? Thanks.

  parent reply	other threads:[~2013-02-06 17:43 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-02-06 10:47 Laxman Dewangan
2013-02-06 12:22 ` Peter De Schrijver
2013-02-06 17:37   ` Stephen Warren
2013-02-06 17:43 ` Stephen Warren [this message]
2013-02-12 15:22   ` Laxman Dewangan
2013-02-12 15:17 Laxman Dewangan
2013-02-12 15:19 ` Laxman Dewangan

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