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[199.106.103.254]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-367405ed2absm1247328eec.5.2026.10.20.13.59.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 20 Oct 2026 13:59:14 -0700 (PDT) Message-ID: <51147489-a26b-480c-9d33-a09eb858fbb7@oss.qualcomm.com> Date: Tue, 20 Oct 2026 13:59:13 -0700 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/7] dt-bindings: phy: qcom: Add qcom,sa8775p-csi2-phy schema To: Krzysztof Kozlowski Cc: bod@kernel.org, vkoul@kernel.org, kishon@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, neil.armstrong@linaro.org, mani@kernel.org, gjorgji.rosikopulos@oss.qualcomm.com, hariram.purushothaman@oss.qualcomm.com, akapatra@quicinc.com, jigarkumar.zala@oss.qualcomm.com, loic.poulain@oss.qualcomm.com, vladimir.zapolskiy@linaro.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20261016235502.2274268-1-anusha.nandi@oss.qualcomm.com> <20261016235502.2274268-3-anusha.nandi@oss.qualcomm.com> <20261019-ninja-velociraptor-of-gallantry-2efa3c@quoll> Content-Language: en-US From: Anusha Arun Nandi In-Reply-To: <20261019-ninja-velociraptor-of-gallantry-2efa3c@quoll> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIwMDA4MyBTYWx0ZWRfX+swtCz41E54A 11G5Hu8i5onrN6vD869YaUHa29j4Fh1LSVTAYfy7SKuPTYO9aVS+aPAD3pasFrndHdT7oA1qwql S4Wv7QTJ90dFmT1cCxpGrgYtrhv52rM= X-Proofpoint-GUID: 6lFpgonF-NEx8YE5HE6dwi5pvtJzlkFy X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIwMDA4MyBTYWx0ZWRfX0PuB7ki3sUwC ruywtfsvwUdjE8x/nrnKIcBbiPWfiYkjJDwiBE0iMg/u0YZqfQPqEpMfOCUIwh/10rpch/aIco6 EInBYSTr3mSg58pwVxiul5Cwun9lcWWbXYj1XCLwXZ0uEPBuQdhBYcQOa7YQGMl7XVmS5gxVfn6 LY3bPQEeKAdl1q6p1fSG5DGjsnx3ykujYoien6iLp0+r6QOlITXFm0hh2hRFyBg+1UZeF56UKS3 CFCYTYARqP+iPyeUI+5k/Bl/mXAvZeIheJLhnDOLGpCiAQvZknbwQmDtPu9rEMqayB8vzqTiekV gypz5WJaTb9M+6OHCratEhVyYFkjEqkPTJiT8uZ9qzoEt2EQaCLgOjJ57c1lUkglSdXwSt1gaAy 40Z4/nJIn6tF7GYwhsF+zHrDT4Wq5eid+cBnEIMCZOzxc45gZJVmiTYaPUC9rR21dS+glFYNq2M 1El0VaVXiUdWCvFajIg== X-Authority-Analysis: v=2.4 cv=R42WitRX c=1 sm=1 tr=0 ts=6ad7d624 cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=P-IC7800AAAA:8 a=gEfo2CItAAAA:8 a=EUspDBNiAAAA:8 a=sn4hIavaYfXsKkgl5soA:9 a=QEXdDO2ut3YA:10 a=scEy_gLbYbu1JhEsrz4S:22 a=d3PnA9EDa4IxuAV0gXij:22 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-ORIG-GUID: 6lFpgonF-NEx8YE5HE6dwi5pvtJzlkFy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-20_04,2026-10-19_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 lowpriorityscore=0 priorityscore=1501 suspectscore=0 spamscore=0 malwarescore=0 adultscore=0 clxscore=1015 impostorscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610200083 Hi Krzysztof, Thank you for the comments. I have replied to Bryan's comment about a single generic yaml file. Based on his comments, I will drop the next version of this patchset with these comments addressed. Best Regards, Anusha On 10/19/2026 12:16 AM, Krzysztof Kozlowski wrote: > On Fri, Oct 16, 2026 at 04:54:57PM -0700, Anusha Arun Nandi wrote: >> Add a device-tree binding for the Qualcomm SA8775P MIPI CSI2 >> PHY, modelled as a standalone generic-PHY provider like the existing >> qcom,x1e80100-csi2-phy, so CAMSS can consume the CSIPHY through the >> common PHY framework instead of driving it in-line. > > A nit, subject: drop second/last, redundant "schema". The > "dt-bindings" prefix is already stating that these are schemas. > See also: > https://elixir.bootlin.com/linux/v7.1-rc7/source/Documentation/devicetree/bindings/submitting-patches.rst#L23 > >> >> Follows the qcom,x1e80100-csi2-phy schema's shape: a ports/port@0 >> sensor-input endpoint carrying data-lanes/bus-type (D-PHY only for >> now, C-PHY bus-type value is accepted by the schema but wired up by a >> companion series), a port@1 CSID output, and a mandatory >> operating-points-v2 table plus power-domains/power-domain-names. >> >> Unlike x1e80100, SA8775P's CSIPHY has a single power-domain: the >> Titan Top GDSC, matching the legacy in-tree CAMSS driver's >> sa8775p_resources.pd_name = "top" (drivers/media/platform/qcom/camss/ >> camss.c) and the existing lemans.dtsi camss node's power-domains = >> <&camcc CAM_CC_TITAN_TOP_GDSC>. It is not OPP-scaled, only kept >> enabled, the same way x1e80100's own "top" domain is. >> >> The PHY takes three clocks (core, timer and the shared CSID CSIPHY RX >> clock) and the vdda-phy/vdda-pll supplies. The core/timer naming >> matches x1e80100's clock-names convention for the same pair of >> clocks. >> >> Signed-off-by: Anusha Arun Nandi >> --- >> .../bindings/phy/qcom,sa8775p-csi2-phy.yaml | 172 ++++++++++++++++++ >> 1 file changed, 172 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/phy/qcom,sa8775p-csi2-phy.yaml >> >> diff --git a/Documentation/devicetree/bindings/phy/qcom,sa8775p-csi2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sa8775p-csi2-phy.yaml >> new file mode 100644 >> index 000000000000..b66ec2f14189 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/phy/qcom,sa8775p-csi2-phy.yaml >> @@ -0,0 +1,172 @@ >> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) >> +# Copyright (c) 2026 Qualcomm Innovation Center, Inc. All rights reserved. >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/phy/qcom,sa8775p-csi2-phy.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Qualcomm SA8775P CSI2 PHY >> + >> +maintainers: >> + - Anusha Arun Nandi >> + >> +description: >> + Qualcomm MIPI CSI2 D-PHY. Connects MIPI CSI2 sensors to Qualcomm's Camera >> + CSI Decoder on the SA8775P SoC. >> + >> +properties: >> + compatible: >> + const: qcom,sa8775p-csi2-phy >> + >> + reg: >> + maxItems: 1 >> + >> + clocks: >> + maxItems: 3 >> + >> + clock-names: >> + items: >> + - const: core >> + - const: timer >> + - const: csiphy_rx > > You just named it basde on clock name. Instead, name it based on the > input name. csiphy is also completely redundant. > >> + >> + interrupts: >> + maxItems: 1 >> + >> + operating-points-v2: true >> + >> + opp-table: >> + type: object >> + >> + power-domains: >> + items: >> + - description: Titan Top GDSC - Titan ISP Block, Global Distributed Switch Controller. >> + >> + power-domain-names: >> + items: >> + - const: top >> + >> + vdda-phy-supply: >> + description: Phandle to PHY supply. >> + >> + vdda-pll-supply: >> + description: Phandle to PLL supply. >> + >> + ports: >> + $ref: /schemas/graph.yaml#/properties/ports >> + >> + properties: >> + port@0: >> + $ref: /schemas/graph.yaml#/$defs/port-base >> + description: >> + Sensor input. A single sensor is described by a single endpoint >> + with one to four data lanes, numbered 1-4. The clock lane is >> + position 0. >> + >> + unevaluatedProperties: false >> + >> + patternProperties: >> + "^endpoint(@0)?$": > > so not a pattern really and just endpoint. > >> + $ref: /schemas/media/video-interfaces.yaml# >> + unevaluatedProperties: false >> + properties: >> + bus-type: >> + enum: >> + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY >> + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY >> + default: 4 >> + >> + data-lanes: >> + minItems: 1 >> + maxItems: 4 >> + items: >> + minimum: 1 >> + maximum: 4 >> + description: >> + Data lane positions following this endpoint's clock >> + lane. Positions are a per-port logical numbering, not >> + package pad or ball positions. >> + >> + required: >> + - data-lanes >> + - remote-endpoint >> + >> + port@1: >> + $ref: /schemas/graph.yaml#/properties/port >> + description: Output to the CAMSS CSID controller. >> + >> + required: >> + - port@0 >> + - port@1 >> + >> +required: >> + - compatible >> + - reg >> + - clocks >> + - clock-names >> + - interrupts >> + - operating-points-v2 >> + - power-domains >> + - power-domain-names >> + - vdda-phy-supply >> + - vdda-pll-supply >> + - ports >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + #include >> + #include >> + #include >> + >> + csiphy0: csiphy@ac9c000 { > > Drop unused label > > git grep csiphy@ > > Don't come with own style. > > Best regards, > Krzysztof