From: "Rafael J. Wysocki" <rjw@rjwysocki.net>
To: "David E. Box" <david.e.box@linux.intel.com>,
jacob.jun.pan@linux.intel.com
Cc: lenb@kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org
Subject: Re: [PATCH] x86/intel_idle: add GLK support
Date: Thu, 27 Apr 2017 00:36:42 +0200 [thread overview]
Message-ID: <5173906.Kty4Ih4RO9@aspire.rjw.lan> (raw)
In-Reply-To: <20170423060625.4593-1-david.e.box@linux.intel.com>
On Saturday, April 22, 2017 11:06:25 PM David E. Box wrote:
> From: "Box, David E" <david.e.box@intel.com>
>
> Gemini Lake uses the same C-states as Broxton and also uses the
> IRTL MSR's to determine maximum C-state latency.
>
> Signed-off-by: David E. Box <david.e.box@linux.intel.com>
You could use the code names consistently in your subjects (but I can fix this up).
Jacob, any concerns?
> ---
> drivers/idle/intel_idle.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
> index e045a5c..778af71 100644
> --- a/drivers/idle/intel_idle.c
> +++ b/drivers/idle/intel_idle.c
> @@ -1097,6 +1097,7 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {
> ICPU(INTEL_FAM6_XEON_PHI_KNL, idle_cpu_knl),
> ICPU(INTEL_FAM6_XEON_PHI_KNM, idle_cpu_knl),
> ICPU(INTEL_FAM6_ATOM_GOLDMONT, idle_cpu_bxt),
> + ICPU(INTEL_FAM6_ATOM_GEMINI_LAKE, idle_cpu_bxt),
> ICPU(INTEL_FAM6_ATOM_DENVERTON, idle_cpu_dnv),
> {}
> };
> @@ -1309,6 +1310,7 @@ static void intel_idle_state_table_update(void)
> ivt_idle_state_table_update();
> break;
> case INTEL_FAM6_ATOM_GOLDMONT:
> + case INTEL_FAM6_ATOM_GEMINI_LAKE:
> bxt_idle_state_table_update();
> break;
> case INTEL_FAM6_SKYLAKE_DESKTOP:
>
next prev parent reply other threads:[~2017-04-26 22:43 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-23 6:06 David E. Box
2017-04-26 22:36 ` Rafael J. Wysocki [this message]
2017-05-04 23:35 ` Jacob Pan
2017-04-29 3:56 ` Len Brown
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